Via-in-pad means placing a PCB via directly within a component’s surface-mount solder pad. The via provides an electrical path to another copper layer without using a separate nearby via and connecting trace. This arrangement can help route dense component layouts, particularly where a fine-pitch package leaves little room for conventional fanout. Altium’s via-in-pad overview explains the placement and the different via structures that can be used.
Why designers use via-in-pad
Moving a layer connection into the pad can free routing space beside the component. A design may use through vias or an appropriate blind-via construction, depending on the stackup and fabrication process. The choice must account for the component footprint, connected layers and assembly requirements. A via-in-pad location alone does not specify how its hole will be treated.
Why an open hole can affect soldering
During reflow, solder can enter an open via and reduce the amount remaining at the intended joint. Eurocircuits highlights solder escape and wicking in its assembly guidance. The effect depends on the hole, pad and assembly process. A layout that is electrically connected in CAD can still require additional fabrication and assembly review.
Filled and capped vias, and VIPPO
Via-in-pad plated over, often abbreviated VIPPO, provides a plated pad surface over the via. One established approach fills a plated via with resin, prepares the surface and caps it with copper. Eurocircuits documents this construction in its via-filling guide. The hole identification, fill method and required surface must be agreed with the selected fabricator.
“Tented,” “plugged,” “filled” and “capped” describe different treatments. A solder-mask covering does not by itself specify a flat copper surface suitable for a component joint. State the required construction explicitly instead of using “via-in-pad” as the complete manufacturing instruction.
Thermal pads need package-specific review
Thermal vias in a large exposed pad should be designed using the component manufacturer’s guidance. TI’s QFN and SON attachment report addresses thermal-pad vias, solder-volume loss and stencil design together. Its examples are starting points for the relevant package and process. They do not establish one universal via diameter, filling rule or paste pattern for every PCB.
What to include in the fabrication package
- Identify the component pads and exact vias that require special treatment.
- Provide the layer span, drill information, stackup and intended copper connections.
- Specify the agreed filling, capping, surface finish and inspection requirements.
- Review the component land pattern, solder-mask openings and stencil with the assembly team.
For an RF board, see the via-in-pad RF PCB guide and assembly review information. Submit the manufacturing files and acceptance requirements through the quote form so the proposed construction can be assessed for the project.
Put this into production
Request a material, stackup and manufacturing review for your RF PCB project.