Microstrip vs CPW | Which Topology for mmWave PCB

Microstrip vs CPW: The Short Answer

Microstrip routes a signal trace above a ground plane separated by a dielectric; coplanar waveguide (CPW) places the signal trace between coplanar ground conductors on the same metal layer. At millimeter-wave frequencies (roughly 24–79 GHz), CPW offers tighter field confinement, easier shunt grounding, and less sensitivity to substrate thickness variation, while microstrip remains simpler to route, easier to model in most EDA tools, and more forgiving when board-level integration with lower-frequency circuits is required. Neither topology is universally superior—the right choice depends on frequency, loss budget, component interface, and fabrication capability.

How Each Topology Works

Microstrip

A microstrip line is a conductor of width W on the top surface of a dielectric substrate of height h, backed by a continuous ground plane. The electromagnetic field is partly in the dielectric, partly in air, giving a quasi-TEM mode with an effective dielectric constant (ε_eff) between 1 and the substrate’s Dk. Characteristic impedance is set primarily by the W/h ratio. For a 50 Ω line on RO4350B (Dk 3.48, 0.254 mm / 10 mil substrate), trace width is roughly 0.54 mm (21 mil).

Coplanar Waveguide (CPW / CPWG)

A CPW line has a center conductor of width W flanked by two ground planes separated by gaps of width G, all on the same metal layer. When a bottom ground plane is also present—the most common PCB configuration—it is called conductor-backed CPW or grounded CPW (CPWG). Impedance depends on both the W/G ratio and the substrate height. Because the dominant field sits in the gaps rather than traversing the full substrate thickness, CPW is less sensitive to dielectric-thickness tolerance and can achieve tighter field confinement at high frequencies.

For a deeper look at how CPW dimensions set impedance, use the calculator below. Enter your substrate Dk, height, trace width, and gap to get a 50 Ω target or verify an existing layout.

For example, on a 0.127 mm (5 mil) RO3003 laminate with Dk 3.00, a 0.20 mm trace width with 0.10 mm gaps yields approximately 50 Ω in CPWG mode. If the gap opens to 0.15 mm while the trace stays the same, impedance rises toward 60 Ω—highlighting how gap tolerance dominates CPW impedance control. Verify your own stackup in the tool above before committing a layout.

Head-to-Head Comparison Table

Loss Mechanisms in Detail

Conductor Loss

At mmWave frequencies, skin depth in copper falls below 0.3 µm. Surface roughness—typically characterized by Rz or Rq on the copper–dielectric interface—becomes a dominant loss multiplier. The Rogers RO3003 datasheet specifies a smooth rolled-copper option (Rz ≈ 1.0 µm) that cuts conductor loss roughly 15–20 % versus standard electrodeposited foil at 77 GHz. This benefit applies equally to microstrip and CPW, but CPW’s current crowding at the gap edges makes it slightly more sensitive to edge roughness and etch quality.

Dielectric Loss

Dielectric loss scales with frequency and the loss tangent (Df) of the substrate. At 77 GHz, PTFE-based laminates like RO3003 (Df ≈ 0.001) outperform hydrocarbon ceramics such as RO4350B (Df ≈ 0.0037) by a significant margin. For a comparison of these PTFE versus hydrocarbon laminate chemistries, the trade-off is clear: PTFE wins on loss, hydrocarbon wins on processability and cost.

Radiation and Surface-Wave Loss

Microstrip on a substrate thicker than roughly λ_d/10 (dielectric wavelength divided by 10) begins launching surface waves that radiate at bends and discontinuities. At 77 GHz on RO3003 (Dk 3.00), λ_d ≈ 2.25 mm, so substrate height should stay below about 0.225 mm. In practice, 0.127 mm (5 mil) is the standard choice. CPW is inherently more resistant to surface waves because its coplanar ground conductors confine the fields laterally, but it can excite a parasitic slot-line (odd) mode at discontinuities. Suppressing this mode requires stitching vias or air bridges between the two ground halves—an extra fabrication step.

Frequency-Dependent Guidance

Sub-6 GHz to 24 GHz

Microstrip dominates. Substrate heights of 0.254–0.508 mm (10–20 mil) are comfortable, surface waves are not an issue, and routing density matters more than field confinement. CPW appears mainly in test fixtures and probe-based measurements. For sub-6 GHz versus mmWave 5G board design, microstrip is the default topology at the lower band.

24–47 GHz (5G FR2, ISM, satcom)

Both topologies are viable. Microstrip works well on thin substrates (5–10 mil) with careful bend radii and via transitions. CPW becomes attractive when the MMIC or RFIC uses flip-chip packaging—Texas Instruments’ AWR series 60 GHz radar transceivers, for instance, present a CPWG launch pattern. Mixing the two on one board is common: CPW at the die attach, transitioning to microstrip for the feed network.

60–79 GHz (automotive radar, WiGig, V-band backhaul)

Field confinement and fabrication tolerance rule the decision. At 77 GHz, a ±0.5 mil etch variation on a 5 mil trace changes microstrip impedance by roughly ±5 Ω—manageable but tight. The same etch error on a CPW line with 4 mil gaps can swing impedance by ±7 Ω because both gap edges shift. Automotive radar modules (like those using NXP TEF82xx or Infineon AURIX + RXS families) often use a CPWG launch from the flip-chip transceiver, transitioning within 1–2 mm to microstrip feed lines for the patch antenna array.

Above 60 GHz, substrate integrated waveguide (SIW topology) also competes, offering the lowest radiation loss at the cost of the largest footprint.

Fabrication and Tolerance Considerations

Etch Tolerance

Standard photolithographic etch tolerance on inner layers is ±0.5 mil (±12.7 µm) per IPC-6012 Class 3 requirements. For outer layers the tolerance can widen to ±1.0 mil depending on copper weight and chemistry. CPW’s impedance depends on two gap edges per side (four edges total), so etch uniformity across the panel matters more than for microstrip, where only the trace width and ground planarity are critical.

Plating Finish

At mmWave, the surface finish contributes measurable loss. Immersion gold (ENIG) adds roughly 0.05–0.10 dB/cm at 77 GHz compared to bare copper due to the lossy nickel barrier layer. ENEPIG replaces part of the nickel with palladium, reducing this penalty. For a detailed breakdown, see the ENIG versus ENEPIG comparison for RF.

Via Stitching and Mode Suppression

CPWG requires ground-stitching vias between the coplanar ground pads and the bottom ground plane, spaced at less than λ_g/8 to suppress the parallel-plate waveguide mode. At 77 GHz that means via pitch under about 0.30 mm—achievable with laser-drilled microvias but not with standard mechanical drilling. Microstrip avoids this complexity entirely, which is one reason many production radar modules still prefer microstrip feed networks even when the MMIC launch is CPW.

Transitions Between Microstrip and CPW

Most real mmWave boards use both topologies, so the transition quality is often more critical than the choice of either one alone. A well-designed CPW-to-microstrip transition can achieve better than 20 dB return loss from DC to 80 GHz. Key design rules:

• Taper the ground: Gradually widen the CPW gap while tapering the signal trace to match the microstrip width. A linear taper of 3–5 × substrate height in length is a practical starting point.
• Via fence the transition: Place ground vias at the taper boundary to prevent slot-line mode excitation.
• Simulate in 3-D: Analytical models break down at transitions; full-wave simulation (HFSS, CST) is essential. Altium’s impedance-controlled routing documentation covers stackup-aware design rules that help keep transitions clean in layout.
• Minimize length: Every extra 0.1 mm of transition adds insertion loss and a potential reflection point. Keep the total transition under 0.5 mm at 77 GHz.

Verdict: Choose Microstrip When… Choose CPW When…

Choose microstrip when:

• The MMIC or connector interface is a standard microstrip launch (e.g., end-launch SMA, SMPM, or wirebond QFN).
• Routing density is tight and you cannot afford coplanar ground clearance on the signal layer.
• The design operates below 40 GHz on a substrate thin enough to avoid surface waves.
• Your fabricator’s etch tolerance is marginal—microstrip tolerates it better.

Choose CPW / CPWG when:

• The MMIC uses flip-chip or wafer-level packaging with coplanar RF pads.
• You need easy shunt grounding for bypass capacitors, ESD structures, or stub filters without via inductance.
• Substrate thickness tolerance is loose and you want impedance set primarily by lateral geometry.
• Operating above 60 GHz and you need to suppress surface-wave radiation at bends and T-junctions.

Use both when: Nearly every 77 GHz automotive radar board does. CPW at the flip-chip launch, a short taper transition, then microstrip for the antenna feed network. Design the transition first, then optimize each section independently.

FAQ

Is CPW always lower loss than microstrip at mmWave?

Not necessarily. CPW can have lower dielectric loss because more field energy sits in the air-filled gap, but its conductor loss is often higher due to current crowding at the gap edges. On thin, low-Df substrates like 5 mil RO3003, total loss is comparable—typically 0.55–0.65 dB/cm for both at 77 GHz. The winner depends on copper roughness, plating finish, and trace geometry.

Can I use FR-4 for CPW at mmWave?

Standard FR-4 (Dk ≈ 4.3, Df ≈ 0.020 at 10 GHz) is impractical above about 10 GHz for either topology. At 28 GHz, FR-4 dielectric loss alone exceeds 1.5 dB/cm. Low-loss laminates—PTFE, modified hydrocarbon, or liquid-crystal polymer—are required. See the RF laminate comparison hub for material options.

Do I need air bridges for CPWG on a PCB?

Air bridges (metal straps connecting the two coplanar grounds over the signal trace) are the gold standard for slot-mode suppression in MMIC-level CPW. On a PCB, ground-stitching vias between the coplanar ground pads and the bottom reference plane serve the same purpose and are far easier to fabricate. Space them at λ_g/8 or tighter.

What is the minimum feature size for 77 GHz CPW on a PCB?

Typical 77 GHz CPWG lines on 5 mil RO3003 use trace widths of 0.15–0.25 mm and gaps of 0.08–0.12 mm. Gaps below 0.075 mm (3 mil) push standard photolithographic PCB processes to their limit; laser direct imaging (LDI) exposure and tightly controlled etch chemistry are recommended. Confirm your fabricator can hold ±0.5 mil on both trace and gap before finalizing the design.

How do I measure CPW impedance on a finished board?

Time-domain reflectometry (TDR) with a coplanar probe is the most direct method. A vector network analyzer (VNA) with calibrated GSG probes provides both impedance and loss data across frequency. For guidance on choosing between these instruments, see the TDR versus VNA impedance measurement comparison.