RF PCB Engineering Tools

Copper Roughness Loss Calculator | Huray & Hammerstad

Calculate the additional conductor loss caused by copper foil roughness using the Huray snowball and Hammerstad correction models, with practical guidance on foil grades, frequency limits, and stackup trade-offs for RF and high-speed PCBs.

Comparison of rough and smooth copper foil surfaces for PCB use

What Is Copper Roughness Loss and Why Does It Matter?

Copper roughness loss is the additional conductor attenuation caused by the microscale texture on the surface of electrodeposited or rolled-annealed copper foil. At frequencies above roughly 1 GHz, the skin depth shrinks to the same order as the foil’s surface features (typically 0.3–6 µm RMS), forcing current to follow a longer, more tortuous path. A copper roughness calculator applies correction factors—most commonly the Huray snowball model or the Hammerstad–Jensen model—to the smooth-conductor loss so you can predict real-world insertion loss before fabrication.

Getting this number right matters because roughness can add 30–80 % extra loss at 10 GHz on standard HTE foil, and even more at millimeter-wave frequencies. If you ignore it, your simulated S21 will be optimistic by several dB per inch, and your link margin, filter passband, or antenna efficiency will not match the bench.

Skin Depth and the Physics of Roughness

Microstrip cross-section showing copper roughness at the dielectric interface

The skin depth δ of copper at frequency f is:

δ = 1 / √(π · f · µ₀ · σ)

where σ ≈ 5.8 × 10⁷ S/m for annealed copper and µ₀ = 4π × 10⁻⁷ H/m. At 1 GHz, δ ≈ 2.1 µm; at 10 GHz, δ ≈ 0.66 µm; at 77 GHz, δ ≈ 0.24 µm. Standard 1-oz HTE (high-temperature elongation) foil has an Rz roughness of 5–8 µm on the matte side, so even at 1 GHz the roughness peaks are several skin depths tall. Current crowds into those peaks and valleys, increasing effective resistance.

Two widely used analytical models correct for this effect: the Hammerstad–Jensen model and the Huray model. Each takes a different geometric abstraction of the surface.

Hammerstad–Jensen Roughness Model

Hammerstad and Jensen (1980) treat the rough surface as a uniform layer of hemispherical bumps and derive a multiplicative correction factor KHJ applied to the smooth-conductor attenuation αsmooth:

KHJ = 1 + (2/π) · arctan(1.4 · (Δ/δ)²)

where Δ is the RMS roughness height and δ is the skin depth. As Δ/δ → ∞ the factor saturates at 2, meaning roughness can at most double the loss. This ceiling is the model’s main limitation: measurements on very rough foil at millimeter-wave frequencies often exceed the factor-of-two cap.

When Hammerstad Works Well

  • Frequencies below about 10 GHz with standard or RTF (reverse-treat foil) copper.
  • Quick sanity checks during early stackup planning.
  • Designs where Δ/δ stays below roughly 2, keeping the model within its validated range.

Huray Snowball Roughness Model

The Huray model (2006) represents the rough surface as a lattice of uniform copper spheres (“snowballs”) sitting on a flat plane. It solves the electromagnetic scattering from each sphere and sums the additional power absorbed. The key parameters are:

  • Aflat – the flat (tile) area of the unit cell.
  • Ni – the number of spheres of radius ri per tile.
  • The ratio of the total sphere surface area to Aflat, sometimes called the Huray surface ratio (SR).

The correction factor is:

KHuray = 1 + (3/2) · SR · Re{ (1 − j) / (r/δ + (1 − j)) }

Because the snowball geometry does not impose an artificial ceiling, KHuray can exceed 2 and continues to rise with frequency, matching measured data far better above 10 GHz. Most modern 2-D and 3-D field solvers (Ansys HFSS, Keysight ADS, Simbeor) implement the Huray model internally. Ansys’s treatment of surface roughness in HFSS provides a good reference for how the snowball parameters map to solver inputs.

Choosing Huray Parameters from Foil Datasheets

Foil vendors rarely publish Huray sphere radius and count directly. The practical workflow is:

  1. Obtain the Rz (or Rq) roughness from the laminate or foil datasheet—for example, Rogers RO4350B specifies 1-oz ED foil with Rz ≈ 2.8 µm on the drum side.
  2. Use a surface-ratio approximation: SR ≈ 0.5 · (Rz / r) for a single sphere size, where r is typically set to Rz/3 as a starting point.
  3. Tune r and N against one measured insertion-loss data point (a 6-inch test coupon at 10 GHz is standard practice).

Foil Grades and Typical Roughness Values

Foil Grade Rz (µm) Matte Side Typical Use Approx. K at 10 GHz
Standard HTE 5–8 FR-4, low-cost multilayer 1.7–2.0
RTF (Reverse Treat) 2.5–4 Mid-range high-speed 1.4–1.6
HVLP (Hyper Very Low Profile) 1.0–2.0 RF laminates, 5G 1.15–1.30
Rolled Annealed (RA) 0.3–0.6 mmWave, 77 GHz radar 1.05–1.10

Choosing HVLP or RA foil can cut roughness loss by half compared to standard HTE, but these foils cost more and may require oxide-alternative bonding treatments to maintain peel strength. Your PCB stackup thickness calculator should reflect the actual foil and prepreg combination when you plan layer counts.

Practical Impact on RF and High-Speed Channels

Insertion Loss Budget

Total conductor loss per unit length on a microstrip is αc = Krough · αsmooth. For a 50 Ω microstrip on RO4350B at 10 GHz, αsmooth ≈ 0.07 dB/inch. With standard HTE foil (K ≈ 1.8), the real conductor loss is roughly 0.13 dB/inch—nearly double. Add dielectric loss (Df = 0.0037 gives ≈ 0.05 dB/inch at 10 GHz) and the total line loss reaches about 0.18 dB/inch. Over a 4-inch trace that is 0.72 dB, which directly eats into your link margin. You can verify the resulting return-loss impact with a VSWR and return-loss converter.

Signal Integrity and Eye Diagrams

For 28 Gbps NRZ or 56 Gbps PAM-4 SerDes channels, roughness loss tilts the frequency-dependent loss curve, increasing ISI. Accurate Huray modeling in your channel simulator prevents over-specifying equalization taps or under-estimating the required trace length budget.

Copper Balance and Its Interaction with Roughness

RF test coupon board with microstrip traces for insertion loss measurement

Uneven copper distribution across a panel affects etching uniformity, which in turn influences the final trace geometry and roughness profile. If one side of the board has 80 % copper fill and the other has 20 %, differential etching and plating thickness variations can shift the effective roughness by 0.5–1 µm. Use the checker below to flag copper balance risks before they compound your roughness uncertainty.

Loading Copper Balance Risk Checker…

If the tool flags a high imbalance, consider adding copper thieving or ground fill to the sparse layer. This not only improves warpage and etch uniformity but keeps your roughness assumptions valid across the panel.

Hole-to-Copper Clearance and Roughness Zones

Plated through-holes and vias introduce localized roughness variations because the electroplated copper inside the barrel and on the annular ring is typically rougher than the base foil. The clearance between a via’s drill hole and adjacent signal traces determines how much of this rougher copper influences the transmission line’s field distribution. A tight clearance means the fringing fields of a nearby microstrip or stripline interact with the rough plated surface, adding stray loss that the roughness model alone does not capture.

Loading Hole-to-Copper Clearance Checker…

A clearance of at least 10 mil (0.25 mm) between the drill edge and the nearest signal copper is a good starting point for designs above 5 GHz. If the checker flags a violation, widen the anti-pad or re-route the trace. This is especially critical around via transitions in differential pairs, where you can also assess parasitic inductance with a via parasitics calculator.

Reducing Roughness Loss: A Design Checklist

  1. Specify foil grade on the fab drawing. Call out HVLP or RA foil explicitly; do not leave it to the fabricator’s default.
  2. Use the smooth side toward the signal. On microstrip, the foil’s drum (smooth) side should face the dielectric; confirm orientation with your laminator.
  3. Minimize oxide treatments. Black-oxide and brown-oxide processes add 1–2 µm of roughness. Oxide alternatives (e.g., reduced-oxide or silane-based) preserve peel strength with less surface damage.
  4. Validate with test coupons. Include a 50 Ω microstrip coupon of known length on the panel and measure S21 from 100 MHz to the highest frequency of interest. Back-calculate Krough and feed it into your simulation.
  5. Account for both sides of stripline. Stripline has two copper-to-dielectric interfaces, so roughness loss roughly doubles compared to microstrip if both foil faces are equally rough.
  6. Model propagation delay shift. Roughness slightly increases effective Dk, adding 1–3 % to propagation delay on rough foil. This matters for timing-critical parallel buses and radar chirp linearity.

Hammerstad vs. Huray: Which Model Should You Use?

Criterion Hammerstad–Jensen Huray Snowball
Accuracy above 10 GHz Under-predicts (K capped at 2) Tracks measured data well
Input parameters Single Δ (RMS roughness) Sphere radius + count or SR
Ease of use Very simple, one number Requires fitting or vendor data
Solver support All major tools HFSS, ADS, Simbeor, Polar Si9000
Best for Sub-10 GHz, quick estimates 5G NR, 77 GHz radar, 56 Gbps+ SerDes

For mmWave designs such as 77 GHz automotive radar front-ends or 5G FR2 antenna feeds, the Huray model is effectively mandatory. For sub-6 GHz Wi-Fi or GPS, Hammerstad is adequate and faster to set up.

Frequently Asked Questions

What roughness value should I use if the datasheet only gives Rz?

Convert Rz to RMS (Rq) by dividing by approximately 4 for typical PCB foil profiles: Rq ≈ Rz / 4. This is an approximation; for critical designs, request Rq directly from the foil or laminate vendor.

Does roughness affect the dielectric loss too?

Not directly, but the rough copper–dielectric interface creates a mixed-material transition zone that slightly raises the effective Dk and Df. Some simulators model this as an “effective roughness dielectric” layer 1–2 µm thick.

Can I measure roughness in-house?

A stylus profilometer (per IPC-TM-650, Method 2.2.17) gives Rz and Rq. For Huray sphere fitting, an SEM cross-section of the foil surface is needed, which most university or third-party labs can provide.

How much does HVLP foil add to board cost?

Expect a 10–25 % premium on the laminate cost compared to standard HTE, depending on volume and supplier. The loss savings at high frequency often justify the cost by allowing shorter traces or fewer amplifier stages.

Does copper roughness matter for antenna efficiency?

Yes. A patch antenna on standard HTE foil at 28 GHz can lose 1–2 dB of radiation efficiency to conductor roughness alone. Switching to HVLP or RA foil recovers most of that loss.

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