RF PCB Engineering Tools

Patch Antenna Calculator | Rectangular Microstrip Sizing

Use this patch antenna calculator to size a rectangular microstrip patch for any frequency and substrate. The article covers the cavity-model formulas, effective dielectric constant, fringing-length correction, feed-point impedance and substrate selection trade-offs.

Rectangular microstrip patch antenna on a high-frequency PCB substrate

What a Patch Antenna Calculator Does

A patch antenna calculator takes your operating frequency, substrate dielectric constant (Dk) and substrate height, then returns the physical width and length of a rectangular microstrip patch that will resonate at that frequency. It also estimates the input impedance at the radiating edge so you can plan an inset feed or quarter-wave transformer. The math behind the tool is the transmission-line model first published by Munson and refined by Bahl and Bhartia, and every formula below is drawn from that framework.

Core Formulas for Rectangular Patch Sizing

Cross-section of a patch antenna showing substrate layers and fringing fields

Patch Width

The width of a rectangular patch controls the radiation efficiency and the input impedance. The standard expression is:

W = c / (2 f₀) × √(2 / (ε_r + 1))

where c is the speed of light (≈ 3 × 10⁸ m/s), f₀ is the target resonant frequency and ε_r is the relative permittivity of the substrate. A wider patch radiates more efficiently but occupies more board area, so this formula is the practical starting point that balances the two.

Effective Dielectric Constant

Because the fringing fields at the open edges of the patch travel partly through the substrate and partly through air, the wave sees an effective permittivity lower than the bulk Dk. For a wide microstrip (W/h > 1, which is nearly always the case for patches):

ε_eff = (ε_r + 1) / 2 + (ε_r − 1) / 2 × (1 + 12 h / W)^(−0.5)

For a 1.524 mm (60 mil) thick Rogers RO4350B laminate (ε_r = 3.48) at 2.45 GHz, ε_eff works out to roughly 3.18. This number feeds directly into the length calculation.

Fringing-Length Extension (ΔL)

Fringing makes the patch look electrically longer than its physical copper. The Hammerstad correction quantifies the extra length at each open edge:

ΔL = 0.412 h × ((ε_eff + 0.3)(W/h + 0.264)) / ((ε_eff − 0.258)(W/h + 0.8))

Typical ΔL values run from 0.4 h to 0.5 h. Ignoring ΔL will make your fabricated patch resonate a few percent low in frequency — a common first-prototype mistake.

Patch Length

The resonant length is a half guided wavelength minus the two fringing extensions:

L = c / (2 f₀ √ε_eff) − 2 ΔL

At 2.45 GHz on RO4350B (h = 1.524 mm), this gives L ≈ 29.1 mm and W ≈ 38.0 mm — dimensions you can verify in the calculator below.

Try the Patch Antenna Calculator

Enter your target frequency in GHz, substrate Dk and substrate height in mm. The tool returns the patch width, length, ε_eff, ΔL and the approximate edge impedance. Use it to compare substrates quickly: try the same frequency on FR-4 (ε_r ≈ 4.4) versus RO4350B (ε_r = 3.48) and watch how the dimensions and bandwidth shift.

Loading Microstrip Patch Antenna Calculator…

For the 2.45 GHz / RO4350B example, the calculator should return W ≈ 38.0 mm, L ≈ 29.1 mm and an edge impedance near 300–350 Ω. That high edge impedance is normal; you bring it down to 50 Ω with an inset feed (notch depth ≈ 9–10 mm) or a quarter-wave matching section. If you switch to standard 1.6 mm FR-4, the length drops to about 27.8 mm because of the higher Dk, but the loss tangent (Df ≈ 0.020 vs. 0.0037 for RO4350B) will cut your efficiency noticeably above 2 GHz.

Feed-Point Impedance and Matching

Edge Impedance

The impedance at the radiating edge of a half-wave patch is approximated by:

R_edge ≈ 90 × (ε_r² / (ε_r − 1)) × (L / W)²

This typically falls between 150 Ω and 400 Ω depending on the width-to-length ratio. A wider patch (larger W) lowers R_edge.

Inset Feed

The most common PCB-friendly match is an inset feed, where a narrow notch is cut into the patch from the radiating edge. The impedance at depth y₀ from the edge follows:

R_in(y₀) ≈ R_edge × cos²(π y₀ / L)

Set R_in = 50 Ω and solve for y₀. For R_edge = 340 Ω, y₀ ≈ 10.1 mm on a 29.1 mm long patch (about 35 % of L). The notch width is usually kept to 1–2 mm to avoid perturbing the mode pattern.

Probe Feed

A coaxial probe through the ground plane achieves the same impedance taper. The probe position follows the same cos² law, but probe inductance increases with substrate thickness, so for h > 3 mm (118 mil) a capacitive annular ring or L-shaped probe is often needed to cancel the reactive component.

Substrate Selection Trade-Offs

Parameter Low Dk (e.g. 2.2, RT/duroid 5880) Medium Dk (e.g. 3.48, RO4350B) High Dk (e.g. 6.15, RO3006)
Patch size Largest Moderate Smallest
Bandwidth Widest (≈ 3–5 %) Moderate (≈ 2–3 %) Narrowest (≈ 1–2 %)
Radiation efficiency Highest Good Lower (more surface waves)
Cost Highest (PTFE) Moderate (thermoset) Moderate–High
Typical use Satellite, GPS L-band Wi-Fi, ISM, 5G sub-6 Compact IoT, RFID readers

Choose a thicker substrate (h ≈ 0.02–0.05 λ₀) when bandwidth matters; choose a thinner one when you need tight coupling to a feed network or want to suppress surface-wave losses. Above 10 GHz, Df becomes the dominant efficiency killer, so PTFE or low-loss hydrocarbon laminates are effectively mandatory. Rogers RO4350B datasheet lists Dk = 3.48 ± 0.05 and Df = 0.0037 at 10 GHz — numbers you should use in the calculator for a realistic starting design.

From Single Patch to Array

Four-element microstrip patch array with corporate feed network

A single rectangular patch yields about 6–8 dBi of broadside gain. When your link budget demands more, you tile patches into a corporate or series-fed array. Element spacing of roughly 0.5–0.7 λ₀ keeps grating lobes suppressed while providing room for the feed network. Use our patch array spacing and gain calculator to find the inter-element distance and estimate the array directivity. For radar front-ends where beam steering matters, the array factor and grating-lobe tool shows how the pattern changes with scan angle.

Common Design Pitfalls

  • Using Dk at 1 MHz instead of the operating frequency. FR-4 datasheets often quote Dk at 1 MHz (≈ 4.7); at 2.4 GHz it is closer to 4.2–4.4. Always use the value at or near your operating frequency.
  • Ignoring the ground-plane size. The ground plane should extend at least λ₀/4 beyond the patch edges on all sides. A truncated ground shifts the resonance and distorts the back-lobe pattern.
  • Neglecting etch tolerances. A ±25 µm (1 mil) etch error on a 29 mm patch is small, but on a 77 GHz patch (L ≈ 1.1 mm) it shifts the center frequency by several hundred MHz. Specify IPC Class 3 or tighter for millimeter-wave patches.
  • No solder-mask keep-out. Solder mask (Dk ≈ 3.5–4.0) over the patch changes the effective permittivity. Always define a mask opening that clears the radiating copper by at least 0.25 mm.
  • Forgetting the via fence. In multilayer stacks, stitch the ground plane with vias spaced < λ/20 around the patch to suppress parallel-plate modes that rob efficiency.

When a Patch Is Not the Right Choice

Patches are inherently narrowband (1–5 % without stacking or parasitic elements). If your system needs octave bandwidth, consider a slot or Vivaldi structure — our slot antenna dimension tool can get you started. For compact handset applications below 1 GHz, a PIFA antenna calculator is a better starting point because the shorted wall cuts the resonant length in half. And if you need an omnidirectional pattern rather than a broadside beam, a printed dipole design is simpler and better suited.

Design-to-Fabrication Checklist

  1. Pick the operating frequency and required bandwidth to narrow the substrate choice.
  2. Run the patch antenna calculator with at least two candidate substrates; compare patch size, ε_eff and estimated bandwidth.
  3. Select the feed method (inset, probe, proximity-coupled or aperture-coupled) based on bandwidth, polarization purity and layer count.
  4. Simulate in a 3-D EM solver (HFSS, CST, openEMS) using the calculator output as the initial geometry — expect ±2–3 % tuning.
  5. Define ground-plane extent, solder-mask keep-out and via-fence spacing in the PCB layout.
  6. Specify the laminate by manufacturer part number (not just “Dk = 3.5”) on the fabrication drawing, along with the IPC-6012 class.
  7. After fabrication, verify resonance with a VNA S11 measurement before committing to production volume.

Frequently Asked Questions

How accurate is the transmission-line model?

For a single rectangular patch on a uniform substrate, the transmission-line formulas predict resonant frequency within 1–2 % of full-wave simulation results. Accuracy degrades for thick substrates (h > 0.05 λ₀), stacked patches or non-rectangular shapes, where a cavity model or finite-element solver is needed.

Can I use FR-4 for a patch antenna?

Yes, for prototyping or cost-sensitive products below about 3 GHz. FR-4 loss tangent (Df ≈ 0.018–0.025) limits radiation efficiency to roughly 70–85 % at 2.4 GHz. Above 5 GHz, switch to a low-loss laminate like RO4350B or Isola Astra MT77.

What determines the bandwidth of a rectangular patch?

Bandwidth scales roughly as (h / λ₀) × (1 / √ε_r). Doubling the substrate height approximately doubles the impedance bandwidth, but also increases surface-wave losses and feed-probe inductance. Typical single-layer patches achieve 1–5 %; stacked or U-slot patches can reach 15–25 %.

How do I convert the calculator output to a PCB layout?

Draw a copper rectangle of W × L centered on the top layer, add the feed structure (inset notch or probe pad), and define a continuous ground plane on the layer directly below. Export Gerbers and include a fabrication note specifying the laminate, copper weight and controlled-impedance requirement for the feed line.

Does the calculator account for the radome or enclosure?

No. Any dielectric cover (radome, conformal coating, housing wall) adds an effective loading that lowers the resonant frequency by 1–5 % depending on its thickness and Dk. Add the cover in your EM simulation after using the calculator for the bare-board starting point.

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