TDR vs VNA | Which Impedance Measurement to Trust

TDR vs VNA: The Short Answer

A Time-Domain Reflectometer (TDR) sends a fast step pulse down a trace and plots impedance versus distance, making it the go-to tool for locating where an impedance deviation occurs along a PCB transmission line. A Vector Network Analyzer (VNA) sweeps a continuous-wave signal across frequency and returns S-parameters (magnitude and phase), making it the definitive instrument for characterizing insertion loss, return loss, and frequency-dependent behavior. Neither replaces the other: TDR tells you where a problem is; VNA tells you how bad it is across frequency.

If you only run one test on a production controlled-impedance board, TDR is faster and cheaper per coupon. If you are qualifying a new laminate, validating a connector transition, or characterizing loss above 10 GHz, a calibrated VNA measurement is what you should trust.

How TDR Works

A TDR launches a voltage step with a rise time typically between 20 ps and 200 ps into the device under test. When the traveling wave encounters any change in characteristic impedance—a trace width variation, a via transition, a connector—part of the energy reflects back. The instrument measures the reflected voltage as a function of time, which maps directly to physical distance along the line. The result is an impedance profile, usually displayed in ohms versus nanoseconds or inches.

Spatial Resolution and Rise Time

The spatial resolution of a TDR is governed by the system rise time. A rough rule: the minimum resolvable feature length is about half the electrical distance the step covers during its rise time. For a 35 ps system rise time in a medium with effective Dk of 3.5, the spatial resolution is approximately 1.4 mm (55 mil). A slower 150 ps system resolves features only down to about 6 mm. This matters when you need to see impedance bumps at individual vias or BGA breakouts.

For a deeper look at reading and interpreting a TDR trace, see our guide to TDR measurement basics.

What TDR Does Well

• Localization — pinpoints the physical position of an impedance fault to within millimeters.
• Production speed — a single coupon measurement takes seconds, ideal for 100 % lot verification per IPC-6012 Class 3 requirements.
• Simplicity — no frequency-domain calibration standards needed; launch the probe and read the trace.
• Intuitive output — impedance in ohms versus distance is immediately meaningful to a PCB fabricator or layout engineer.

Where TDR Falls Short

• Frequency content is implicit — the bandwidth is set by the step rise time, and extracting accurate loss or phase data requires post-processing (time-domain gating and FFT), which introduces artifacts.
• Accuracy at very high frequencies — above roughly 20 GHz, fixture parasitics and rise-time limitations make raw TDR readings less trustworthy than a properly calibrated VNA.
• No direct S-parameter output — many signal-integrity simulation flows need S-parameter touchstone files, which VNA provides natively.

To understand what a production TDR report looks like and how to interpret pass/fail criteria, see the TDR impedance test report guide.

How a VNA Works

A VNA stimulates the DUT with a swept sinusoidal signal, measuring both the reflected wave (S11, S22) and the transmitted wave (S21, S12) at each frequency point. The result is a complete set of S-parameters—complex numbers with magnitude and phase—across the instrument’s frequency range, which for modern benchtop VNAs can extend from below 10 MHz to 67 GHz or beyond with millimeter-wave extenders.

Calibration Is Everything

A VNA measurement is only as good as its calibration. The most common technique for coaxial measurements is SOLT (Short-Open-Load-Thru). For on-board or fixture-based measurements, TRL (Thru-Reflect-Line) calibration moves the reference plane onto the PCB itself, removing fixture effects and yielding much cleaner data above 5 GHz. Choosing the wrong calibration method is the single most common source of VNA measurement error in PCB work.

Our detailed walkthrough of VNA calibration methods covers SOLT, TRL, and when to trust each.

What VNA Does Well

• Frequency-resolved data — return loss, insertion loss, group delay, and phase at every frequency point.
• High dynamic range — modern VNAs achieve > 100 dB dynamic range, critical for measuring low-loss transmission lines.
• Native S-parameter output — directly feeds channel simulation, eye-diagram prediction, and EM solver correlation.
• Material characterization — Dk and Df extraction methods (e.g., differential phase length, SPP) rely on VNA data.

Where VNA Falls Short

• No spatial localization — S-parameters are port-to-port; they do not tell you where along a trace the impedance deviates (unless you apply time-domain gating in post-processing, which is essentially converting VNA data back into a TDR-like view).
• Calibration overhead — a full two-port calibration takes 5–15 minutes and requires traceable calibration standards.
• Cost and complexity — a 40 GHz VNA with calibration kit easily costs 5–10× more than a production TDR.

For an example of a VNA-based PCB test flow, see the VNA insertion loss test procedure.

Head-to-Head Comparison

When to Use Each — Clear Verdicts

Choose TDR When…

• You need production-lot impedance verification (50 Ω ± 5 %, 100 Ω differential ± 10 %) on every panel.
• You are debugging a controlled impedance PCB and need to find the exact location of an impedance discontinuity—connector launch, via transition, or etch variation.
• Your signal bandwidth stays below roughly 15–20 GHz and you care about characteristic impedance more than insertion loss.

Choose VNA When…

• You are characterizing insertion loss, return loss, or crosstalk of a channel above 5 GHz.
• You need S-parameter touchstone files for simulation correlation (e.g., correlating an HFSS, CST, or ADS model against measured data).
• You are extracting Dk and Df of a laminate at a specific frequency—essential when qualifying high-frequency PCB materials for millimeter-wave designs.
• You are validating connector or via transitions where the frequency-dependent behavior matters more than the spatial profile.

Use Both When…

For high-speed serial links above 25 Gbps (PAM4 channels, 112G SerDes) and millimeter-wave RF boards (77 GHz radar, 5G FR2), best practice is to use TDR for quick spatial debugging and VNA for final frequency-domain qualification. Many modern high-end oscilloscopes include both TDR and S-parameter extraction in one instrument, bridging the gap.

Impedance and Dielectric Height: Designing Before You Measure

Both TDR and VNA ultimately validate what the stackup design intended. If the dielectric height between a signal trace and its reference plane is wrong, no amount of measurement finesse will save the board. The relationship is direct: for a microstrip, increasing the dielectric height raises the characteristic impedance; decreasing it lowers it. Getting the target dielectric thickness right during stackup design eliminates most impedance failures before fabrication.

Use the calculator below to solve for the dielectric height needed to hit a target impedance. Enter your trace width, copper weight, target Z₀, and substrate Dk, and the tool returns the required dielectric spacing.

For example, targeting 50 Ω on an outer microstrip with a 4.5 mil (0.114 mm) trace width on RO4350B (Dk 3.48) and half-ounce copper (0.7 mil) typically requires a dielectric height around 4.0 mil (0.10 mm). If your fabricator’s prepreg choice forces a 3.2 mil dielectric, the impedance drops to roughly 45 Ω—outside most ±5 % specs. Catching this at the design stage is far cheaper than catching it on a TDR coupon after panel fabrication.

PDN Impedance: Where TDR and VNA Meet Power Integrity

Impedance measurement is not limited to signal traces. Power Distribution Network (PDN) impedance is measured with a VNA (typically a shunt-through or two-port method) to verify that the PDN stays below a target impedance across the frequency range of interest. The target impedance is set by the allowed voltage ripple and the transient current demand of the IC.

Use this calculator to determine your PDN target impedance from supply voltage, ripple budget, and peak transient current.

If your 1.0 V core rail allows 3 % ripple (30 mV) and the processor draws 10 A transient current, the target PDN impedance is 3 mΩ across the relevant bandwidth. A VNA two-port shunt-through measurement from 100 kHz to 1 GHz is the standard way to verify this, as described in the Analog Devices power integrity guide. TDR cannot directly provide this frequency-resolved impedance profile of a PDN.

Converting Between Domains

Mathematically, TDR and VNA data contain the same information—they are Fourier-transform pairs. A VNA’s S-parameters can be inverse-Fourier-transformed into a TDR-like impedance profile (this is the “time-domain transform” feature in most VNA software). Conversely, a TDR waveform can be FFT’d into an S-parameter-like frequency response. However, practical limitations make the native domain more trustworthy:

• VNA → TDR transform works well when the VNA measurement has wide bandwidth and clean calibration. The result closely matches a real TDR, and the spatial resolution equals c / (2 × BW × √Dk_eff).
• TDR → S-parameter transform is noisier because the TDR step has finite rise time and limited low-frequency content. The resulting S-parameters are less accurate than direct VNA data, especially for insertion loss below −0.5 dB.

The IEEE P370 standard for electrical characterization of interconnects provides guidelines on fixture de-embedding and domain conversion that apply to both TDR and VNA workflows.

Common Mistakes in TDR and VNA Measurements

TDR Pitfalls

1. Probe tip compensation not performed — the SMA-to-board launch adds inductance that distorts the first 5–10 mm of the trace. Always compensate or use a reference coupon.
2. Misinterpreting the first reflection — the connector itself has an impedance signature; do not confuse it with the trace.
3. Rise-time mismatch — using a 200 ps TDR to judge a 10 Gbps channel is like using a ruler to measure microns. Match the system bandwidth to the signal bandwidth.

VNA Pitfalls

1. Using SOLT calibration for on-board measurements above 10 GHz — fixture effects dominate. Switch to TRL or use de-embedding.
2. Insufficient IF bandwidth setting — too wide an IF bandwidth increases noise floor; too narrow wastes time. 1 kHz IF BW is a good default for PCB S-parameter sweeps.
3. Ignoring port extension errors — a cable flex between calibration and measurement shifts the reference plane and corrupts phase data.

FAQ

Can a TDR measure insertion loss?

Not directly. TDR measures reflected energy, not transmitted energy. You can estimate loss from the slope of the impedance profile over a long uniform section, but this is far less accurate than a VNA S21 measurement. For any design where insertion loss is a specification, use a VNA.

Can a VNA show where an impedance problem is on a trace?

Yes, via its time-domain transform function, which mathematically converts S11 data into a TDR-like impedance profile. The spatial resolution depends on the VNA’s maximum frequency: a 20 GHz sweep gives roughly the same resolution as a 35 ps TDR step.

Which instrument does IPC-6012 require for controlled impedance?

IPC-6012 references TDR as the standard method for verifying controlled impedance on test coupons. VNA is not prohibited but is not the industry-standard production test. Most fabricators use TDR for 100 % lot verification.

Do I need both instruments for 77 GHz radar PCB validation?

Practically, yes. TDR verifies that the transmission-line impedance is within spec along its length, while VNA characterizes the transition losses, antenna return loss, and feed-network behavior across the 76–81 GHz band. For radar-specific laminate selection trade-offs, see the RO3003 vs RO4350B comparison.

Is a TDR just a special oscilloscope?

Essentially, yes. A TDR is a sampling oscilloscope with a built-in step generator. Many high-bandwidth real-time and sampling oscilloscopes offer TDR options. The key specification is the step rise time: faster rise time means higher bandwidth and finer spatial resolution.