Microstrip Impedance Calculator | Real Laminate Presets

What Is Microstrip Impedance and Why Calculate It?

A microstrip is a trace on the top or bottom surface of a PCB, separated from a continuous ground plane by a single dielectric layer. Its characteristic impedance (Z₀) depends on trace width, dielectric thickness, copper weight and the substrate’s relative permittivity (Dk). Getting Z₀ right—typically 50 Ω for most RF systems, 75 Ω for video, or a custom value for matching networks—is the single most important step in any controlled-impedance layout.

The calculator below lets you enter real laminate parameters (or pick a preset such as RO4350B, RO3003 or standard FR-4) and instantly see the resulting impedance, effective Dk, and electrical delay. Scroll down for the underlying formulas, a worked example, and tips on what to do once you have your number.

Microstrip Impedance Calculator

Enter your substrate Dk, dielectric height (h), trace width (W) and copper thickness (t). The tool returns Z₀, effective dielectric constant (ε_eff) and propagation delay. If you are targeting 50 Ω, adjust W until the output matches—or select a laminate preset and let the tool suggest a starting width.

A typical result on RO4350B (Dk 3.48, 10 mil / 0.254 mm dielectric) is a 50 Ω trace width of roughly 22 mil (0.56 mm) with ½ oz copper. On standard FR-4 (Dk ≈ 4.4, same 10 mil core), the 50 Ω width drops to about 18 mil (0.46 mm) because the higher Dk concentrates the fields more tightly beneath the trace. If your result is narrower than your fab house’s minimum etch capability—often 4 mil (0.1 mm) for standard processes—you need a thinner dielectric or a lower-Dk material.

The Closed-Form Equations Behind the Tool

The calculator uses the Hammerstad–Jensen synthesis, the most widely cited closed-form model for microstrip Z₀. Two regimes apply depending on the width-to-height ratio:

Narrow traces (W/h ≤ 1)

ε_eff = (ε_r + 1)/2 + (ε_r − 1)/2 · [1/√(1 + 12 h/W) + 0.04 (1 − W/h)²]

Z₀ = (60 / √ε_eff) · ln(8 h/W + W/(4 h))

Wide traces (W/h > 1)

ε_eff = (ε_r + 1)/2 + (ε_r − 1)/2 · 1/√(1 + 12 h/W)

Z₀ = (120 π / √ε_eff) / [W/h + 1.393 + 0.667 ln(W/h + 1.444)]

Copper thickness correction (Wheeler’s extension) adjusts the effective width: W_eff = W + (t/π) · [1 + ln(4 π W/t)], where t is the copper thickness. For ½ oz copper (17.5 µm / 0.69 mil), this widens the effective trace by roughly 0.1 mil at W = 20 mil—small, but enough to shift Z₀ by about 0.5 Ω at millimeter-wave frequencies where tolerances are tight.

These equations agree within ±1 % of full-wave simulation up to about 10–12 GHz for typical PCB geometries. Above that, dispersion, surface roughness and conductor losses make a 2.5-D field solver (such as the one in Altium Designer’s impedance-controlled routing engine) essential for final sign-off.

Worked Example: 50 Ω on RO4350B at 5.8 GHz

Design target: 50 Ω microstrip for a 5.8 GHz Wi-Fi front-end on Rogers RO4350B.

• Dk (ε_r): 3.48 ± 0.05 (process specification at 10 GHz)
• Dielectric height (h): 10 mil (0.254 mm), single-core stackup
• Copper: ½ oz (17.5 µm) electrodeposited, ENIG finish

Plugging into the wide-trace formula (W/h will be > 1): the calculator returns W ≈ 22.1 mil (0.561 mm), ε_eff ≈ 2.70, and a propagation delay of about 137 ps/in. That 22 mil trace is comfortably above any standard etch limit, so fabrication is straightforward.

Always add ±10 % to your width tolerance budget for etch compensation. On this stackup, ±2 mil of etch variation swings Z₀ between roughly 46 Ω and 55 Ω—acceptable for most 50 Ω systems where a VSWR below 1.3:1 is the goal, but potentially tight for filter or coupler traces where ±1 Ω matters.

Laminate Selection: How Dk and Df Shape Your Trace

Lower Dk means a wider 50 Ω trace—easier to etch consistently—but also a wider quarter-wave section at any given frequency, so board real estate grows. Higher Dk shrinks the trace and the circuit, at the cost of tighter fab tolerances. Dielectric loss (Df) does not change Z₀ but directly controls insertion loss; use our dielectric loss calculator to quantify that trade-off.

When Microstrip Is Not the Right Choice

Microstrip is the default for single-reference-plane RF routing, but it radiates more than buried structures and is sensitive to nearby components acting as parasitic stubs. Consider these alternatives:

• Stripline — fully shielded between two ground planes, lower radiation, tighter coupling control. Use our stripline impedance calculator for symmetric or offset geometries.
• Coplanar waveguide (GCPW) — ground coplanar with the signal trace plus a ground plane below; excellent for flip-chip and MMIC launches. Try the coplanar waveguide calculator to size the gaps.
• Differential microstrip — for LVDS, USB 3.x or differential RF feeds. Our differential microstrip calculator handles edge-coupled pairs with odd/even mode impedances.

From Impedance to Matching: Completing the RF Chain

Knowing Z₀ is only half the job. Once your trace is sized, you still need to match the source and load. A 50 Ω microstrip feeding a patch antenna whose input impedance is 150 + j20 Ω at resonance will reflect most of the power unless you add a matching network—an L-section, quarter-wave transformer or stub tuner.

The interactive game below lets you practice matching a complex load to 50 Ω by dragging L and C elements on a Smith chart. It builds intuition for how series inductance rotates clockwise and shunt capacitance moves toward the chart center.

After a few rounds, you will notice that narrowband matches (single-frequency) are easy with two elements, while broadband matches need three or more. For numerical design of L, C and pi networks, move on to our impedance matching calculator.

Practical Design Checklist

1. Lock the stackup first. Confirm Dk, Df, dielectric height and copper weight with your laminate vendor’s datasheet—at the frequency you care about, not just 1 MHz. Rogers’ RO4350B datasheet specifies Dk at 10 GHz, which is the value you should enter.
2. Run the calculator. Use the tool above with the datasheet Dk and your target Z₀.
3. Add etch compensation. Ask your fab house for their typical etch-back; add that to your drawn width so the finished copper matches the calculated width.
4. Check the W/h ratio. Ratios below 0.5 push the trace into the narrow regime where impedance is very sensitive to width error. Ratios above 3 waste board space and can excite higher-order modes at high frequencies.
5. Verify with a field solver. For anything above 6 GHz or any impedance tighter than ±5 %, run a 2.5-D simulation and include surface roughness (typically 1–3 µm RMS for standard ED copper).
6. Simulate the transition. Launches from connectors, vias to inner layers, and component pads all introduce discontinuities. Model each one and budget their reflections against your overall return-loss target.

FAQ

What trace width gives 50 Ω on FR-4?

On a standard FR-4 core with Dk ≈ 4.4 and 10 mil (0.254 mm) dielectric height, a 50 Ω microstrip is approximately 18 mil (0.46 mm) wide with ½ oz copper. Thicker dielectrics require proportionally wider traces.

Does copper thickness affect microstrip impedance?

Yes. Thicker copper (e.g., 2 oz vs ½ oz) increases the effective width of the trace, lowering Z₀ by 1–3 Ω depending on geometry. The effect is more pronounced on narrow, high-impedance traces.

Can I use microstrip above 30 GHz?

Microstrip works into millimeter-wave bands—77 GHz automotive radar commonly uses microstrip on RO3003—but radiation loss, surface-wave excitation and conductor roughness loss all increase sharply. Grounded coplanar waveguide (GCPW) or substrate-integrated waveguide (SIW) often outperform plain microstrip above 40 GHz.

How accurate are closed-form microstrip equations?

Hammerstad–Jensen equations agree with full-wave results within ±1 % for W/h between 0.1 and 10 and frequencies up to roughly 10–12 GHz. Beyond that, frequency-dependent Dk, dispersion and fringing corrections are needed.

What is ε_eff and why does it matter?

Effective dielectric constant (ε_eff) accounts for the fact that microstrip fields travel partly through the substrate and partly through air. It is always between 1 and ε_r, and it determines the electrical length—and therefore the propagation delay—of every trace, stub and quarter-wave section on your board. Use our propagation delay calculator to convert ε_eff into ps/in for timing-critical designs.