FAI Report PCB: Complete RF Inspection Guide

What Is an FAI Report PCB Inspection?

An FAI report for a PCB is a structured package of measurements, material certifications and process records that proves the first production unit conforms to every design requirement. For RF and microwave boards the FAI report PCB package goes beyond standard dimensional checks: it must capture dielectric constant (Dk) lot data, controlled-impedance test results, insertion-loss coupons and plating-thickness profiles that directly affect signal integrity at GHz frequencies. Without these RF-specific records, a passing FAI on paper can still hide boards that fail electrically once they reach the test bench.

Why RF PCBs Need a More Rigorous FAI Report PCB Package

A digital board with ±10 % impedance tolerance may work fine, but an RF front-end operating at 5.8 GHz or 24 GHz can suffer visible gain roll-off from a 3 % Dk shift in the laminate. The FAI report is the contractual proof that the fabricator controlled these parameters on the actual production lot—not on a datasheet typical value. It also creates the baseline for statistical process control of future lots.

• Impedance sensitivity: A 50 Ω microstrip on RO4350B (Dk 3.48 ± 0.05) shifts roughly 1.5 Ω per 0.001″ (0.025 mm) change in dielectric thickness. The FAI must record actual measured thickness per coupon, not nominal.
• Material lot variation: High-frequency laminates like Rogers RO3003G2 ship with lot-specific Dk/Df test certificates. The FAI report PCB documentation binds those certificates to the production panels.
• Regulatory traceability: Aerospace (AS9102) and automotive (IATF 16949 with PPAP) auditors expect full FAI packages; an incomplete report can hold up shipments for weeks.

FAI Report PCB Structure: Section by Section

The most widely referenced framework is SAE AS9102 Rev C, which defines three forms. Even if your product is not aerospace, these forms give a clean, auditable skeleton that RF programs benefit from adopting.

Form 1 – Part Number Accountability

Lists the part number, revision, drawing number, purchase-order reference, and the reason for the FAI (new design, process change, or lapsed production). For RF boards, add the stackup revision identifier—stackups change more often than the schematic, and each change should trigger a partial or full FAI.

Form 2 – Material and Process Accountability

This is where RF FAI reports diverge most from generic ones. Each line item should cover:

Linking each material to its certificate of conformance and lot record closes the traceability loop that auditors look for.

Form 3 – Characteristic Accountability (the measurement table)

Every dimension, tolerance and test result called out on the drawing gets a numbered row, the nominal value, the tolerance, the actual measured value, and a pass/fail flag. For an RF PCB, the characteristic list typically includes:

1. Board outline dimensions and routing tolerance (±0.005″ typical)
2. Hole sizes—plated and non-plated—with positional tolerance
3. Controlled-impedance TDR results per net class (50 Ω single-ended, 100 Ω differential, etc.), referencing coupon ID
4. Dielectric thickness per layer pair, measured on microsection
5. Copper weight / plating thickness (electroless + electrolytic) on cross-section
6. Solder-mask registration and opening dimensions on RF pads
7. Back-drill stub length (target ≤ 6 mil for signals above 10 GHz)
8. Surface finish composition and thickness (XRF readings)
9. Insertion-loss test coupon results, if specified (dB/inch at design frequency)
10. Ionic contamination or SIR per IPC-TM-650 2.3.25

For a deeper look at what gets verified and the order of operations, see the RF PCB first article process walkthrough.

Generating Your FAI Report PCB Documentation Package

Pulling together Forms 1–3, material CoCs, cross-section photos, TDR plots and coupon data into a single reviewable package is tedious but non-negotiable. The tool below helps you assemble the documentation checklist and flag any missing items before you submit or review the report.

After generating your checklist, compare it against the actual documents your fabricator delivered. A common gap is the absence of the prepreg Dk certificate or a TDR report that references a coupon geometry different from the production stackup. Catching these omissions before sign-off prevents a false sense of security—and a painful re-FAI later.

How to Read and Interpret the Results

Understanding a PCB test report from your supplier is half the battle. When reviewing an FAI report PCB package, focus on these red flags:

• Impedance within spec but near the edge: If the 50 Ω target reads 47.2 Ω on the coupon (spec 50 ± 5 Ω), the process is drifting. Ask for Cpk data if available.
• Dk certificate frequency mismatch: A CoC showing Dk at 1 MHz is useless for a 24 GHz radar design. Insist on Dk/Df values at or near the operating frequency, per IPC-TM-650 method 2.5.5.5 (split-post dielectric resonator) or equivalent.
• Cross-section photos without scale bars: Without a calibrated reference, dielectric-thickness measurements are unverifiable.
• Missing coupon-to-panel map: If you cannot trace which panel the coupon came from, the data does not prove the shipped boards are conforming.

When the FAI Fails: The 8D Corrective-Action Path

A failed characteristic in the FAI report PCB package does not necessarily mean the boards are scrap. It means you need a documented corrective action before re-running the FAI. The 8D (Eight Disciplines) methodology gives a structured way to contain the defect, find the root cause and verify the fix. Typical RF PCB FAI failures that trigger an 8D include:

• Impedance out of tolerance due to etch variation on fine-line RF traces (≤ 4 mil lines).
• Dielectric thickness outside the ± 0.5 mil window needed for mmWave stripline.
• Back-drill depth inconsistency causing stub resonance above 15 GHz.

Use the starter below to frame your 8D report with the correct discipline headings, team assignment and interim-containment fields already in place.

A well-executed 8D closes the loop: Discipline 5 (root cause) might reveal that the laminator’s pressure profile shifted between qualification and production, causing a 0.3 mil thickness gain. Discipline 7 (preventive action) then mandates a tighter SPC window on press parameters. The completed 8D becomes an annex to the re-issued FAI, so future auditors can see the full history.

Partial vs. Full FAI: When Each Applies

AS9102 allows a partial FAI (also called a delta FAI) when only some characteristics are affected by a change—say a surface-finish switch from ENIG to ENEPIG. In that case, only Form 3 rows tied to the finish (plating thickness, solderability, contact resistance) need re-measurement. Everything else references the original full FAI by report number.

For RF boards, be cautious with partial FAIs after a laminate lot change. Even if the Dk spec is identical, a new lot can shift Dk by 0.02–0.05, enough to move impedance outside tolerance on tight designs. When in doubt, re-run the impedance coupons and the insertion-loss coupon and attach the results as a partial FAI report PCB update.

Checklist: Minimum Contents of an RF PCB FAI Package

• Part number, revision, stackup revision, PO reference (Form 1)
• Laminate, prepreg, copper-foil and finish CoCs with lot numbers (Form 2)
• Dimensional measurements—outline, holes, registration (Form 3)
• Controlled-impedance TDR data per net class, with coupon ID and panel map
• Cross-section microphotographs with calibrated scale bars
• Dielectric and copper thickness per layer pair from cross-section
• Back-drill stub measurement (if applicable)
• Insertion-loss coupon data at design frequency (if specified)
• Ionic contamination or SIR results
• Any nonconformance report or 8D corrective action, if triggered
• Sign-off block: inspector, date, disposition (accept / conditional / reject)

Achieving a clean FAI on the first submission is closely tied to getting the design and fabrication notes right from the start. A practical workflow for RF first pass success reduces the chance of FAI failures significantly.

FAQ

Is an FAI report mandatory for every RF PCB order?

Not by law, but AS9102 mandates it for aerospace parts, IATF 16949 expects an equivalent (PPAP) for automotive, and most defense contracts require it by default. Even for commercial RF products, requesting an FAI report PCB package on the first lot protects you from silent process drift.

How long does an FAI add to lead time?

Expect 2–5 additional working days on top of normal fabrication, depending on how many cross-sections and coupon tests are needed. For mmWave boards with insertion-loss testing, allow the upper end.

Can I use the same FAI if I re-order the same part number?

Yes, as long as no design, process or material change has occurred and the production gap has not exceeded the contractually defined lapse period (often 24 months in aerospace). A laminate lot change alone may justify a partial FAI update for impedance-sensitive RF designs.

What is the difference between an FAI report and a CoC?

A Certificate of Conformance (CoC) is a declaration that the lot meets spec. An FAI report is the evidence—actual measurements, photos and material records—backing that declaration for the first article. The CoC is one page; the FAI can be 20–50 pages for a complex RF stackup.