RF PCB Project Services

Free Stackup Consultation | Impedance & Loss Modeling

A professional stackup consultation catches impedance errors, dielectric mismatches and insertion-loss problems before fabrication. This guide explains what the review covers, how to prepare your files, and lets you solve dielectric height for target impedance yourself.

Cross-section of a multi-layer RF PCB stackup showing copper and dielectric layers

What Is a Stackup Consultation?

A stackup consultation is an engineering review of your PCB layer arrangement—dielectric materials, copper weights, prepreg or core thicknesses, and reference-plane assignments—performed before fabrication data is released. The goal is to confirm that every controlled-impedance trace will hit its target (typically 50 Ω single-ended or 100 Ω differential) and that insertion loss at the operating frequency stays within budget. A thorough consultation also flags symmetry problems that cause bow and twist, hybrid-bonding risks when mixing laminates, and etch compensation needs that a generic online calculator cannot model.

Why a Pre-Fabrication Stackup Review Matters

Engineer reviewing a PCB stackup drawing with TDR equipment on the bench

Correcting a stackup after panels are laminated means scrapping material and restarting, adding weeks and thousands of dollars. A consultation catches these issues on paper:

  • Impedance miss. A 0.5 mil (≈ 13 µm) shift in dielectric height can swing a 50 Ω microstrip by 3–5 Ω—enough to push return loss past –15 dB at millimeter-wave frequencies.
  • Material mismatch. Pairing a Rogers RO4350B core (Dk 3.48) with a standard FR-4 prepreg (Dk ≈ 4.2) in a hybrid stackup creates a Dk boundary that must be accounted for in field modeling.
  • Asymmetry and warpage. An unbalanced stackup bows after reflow, stressing BGA joints. Maintaining symmetric stackup construction is the primary countermeasure.
  • Loss budget overrun. At 28 GHz, choosing a laminate with Df 0.004 instead of Df 0.0017 can double the dB-per-inch conductor-plus-dielectric loss, eating into link margin.

What a Full Consultation Covers

1. Impedance Modeling

The engineer builds a cross-section model of every controlled-impedance net class—microstrip, embedded microstrip, stripline, coplanar waveguide with ground (CPWG)—using a 2-D field solver. Inputs include the manufacturer’s pressed-thickness tolerance (often ± 0.5 mil for thin cores), the trapezoidal etch profile rather than an idealized rectangle, and the frequency-dependent Dk of the chosen laminate. The output is a target trace width and spacing for each net class, plus a sensitivity table showing how much impedance shifts per mil of dielectric change.

2. Dielectric Height Selection

Choosing the right dielectric height is the single most leveraged decision in impedance control. Thinner dielectrics allow narrower traces (helpful for dense routing) but increase loss density and tighten fabrication tolerance. Use the solver below to find the dielectric height that hits your target impedance for a given trace width and Dk. Enter your laminate’s Dk, the trace width in mils, copper thickness, and your target impedance.

Loading Impedance Dielectric Height Solver…

For example, a 50 Ω microstrip on RO4350B (Dk 3.48) with a 12 mil trace and 0.5 oz copper (0.7 mil) solves to roughly 10 mil dielectric height. If your fabricator’s nearest standard core is 10 mil ± 0.5 mil, the impedance window lands between about 48 Ω and 52 Ω—within a typical ± 10 % tolerance. If the window is tighter (± 5 %), you may need to widen the trace or move to a thicker core to desensitize the design. This kind of trade-off is exactly what the consultation quantifies.

3. Insertion-Loss and Dk/Df Analysis

Loss modeling sums conductor loss (skin effect, surface roughness) and dielectric loss (proportional to frequency × Df). At 5 GHz on standard FR-4 (Df ≈ 0.020), a 6-inch trace loses roughly 1.2 dB; the same trace on Rogers RO3003G2 (Df 0.001) loses about 0.25 dB. The consultation maps every critical path’s loss against the system’s gain budget and recommends material swaps only where the loss matters—keeping cost under control.

4. Hybrid Stackup and Bonding Review

Many RF boards use a low-loss laminate for the top signal layers and FR-4 for power and digital layers. The consultation verifies that the prepreg bonding the two materials is compatible in CTE, flow characteristics, and Tg. It also confirms that the pressed Dk of the prepreg is used in the impedance model—not the resin-only Dk from the datasheet—since glass content shifts the effective Dk by 0.2–0.4 depending on resin percentage and glass style. Consult the RF PCB material selection guide for a broader comparison of laminate families.

5. Stackup Documentation Deliverable

The consultation produces a formal stackup drawing that includes layer order, material call-outs with manufacturer part numbers, copper weights, finished dielectric thicknesses, impedance targets per net class, and a cross-section diagram. This document becomes part of the fabrication package alongside Gerber data. Having it reviewed before release—ideally alongside a pre-production Gerber review—eliminates ambiguity between designer and fabricator.

How to Prepare for a Stackup Consultation

Bring these items to make the review efficient:

  1. Target impedances and net classes. List every controlled-impedance requirement: 50 Ω single-ended, 90 Ω or 100 Ω differential, CPWG, etc.
  2. Operating frequency range. The dominant frequency determines which Dk/Df values to use (Dk is frequency-dependent; Rogers publishes values at 10 GHz as a reference per RO4350B laminate datasheets).
  3. Layer count and routing density. More layers give flexibility but add cost; the consultation can suggest whether 6 layers suffice or 8 are needed.
  4. Mechanical constraints. Total board thickness (often 62 mil / 1.57 mm standard), connector keep-out heights, and flex zones if applicable.
  5. Preferred materials or must-avoid materials. Supply-chain constraints matter; the RF material sourcing service can confirm lead times before the stackup is locked.

Test Your Impedance Intuition

Hybrid RF PCB edge showing Rogers and FR-4 laminate layers

Understanding how trace width, dielectric height, and Dk interact is a skill that improves with practice. The interactive matching game below lets you experiment: given a target impedance, adjust parameters to hit the mark. It reinforces the same relationships the consultation engineer uses every day.

Loading Impedance Matching Game…

If you find that small Dk changes swing impedance more than trace-width changes, you have discovered why material selection and pressed-thickness control dominate the tolerance budget at high frequencies. This intuition helps you ask better questions during a consultation and evaluate the trade-offs the engineer presents.

After the Consultation: Verification

A stackup model is only as good as the fabricated result. After first-article panels are built, coupon-based TDR (time-domain reflectometry) testing confirms that modeled impedance matches reality. An impedance verification service using TDR provides a per-lot report and flags any drift before production ramps. The consultation engineer uses first-article data to refine the model for subsequent lots—closing the loop between design and manufacturing.

Stackup Consultation Checklist

Step Owner Key Output
Gather impedance targets and frequency Designer Net-class table
Select candidate materials Designer + Consultant Dk/Df at operating freq
Build cross-section model Consultant Trace width / spacing per class
Run sensitivity analysis Consultant Impedance vs. thickness tolerance
Model insertion loss per critical path Consultant dB/inch and total path loss
Check symmetry and CTE compatibility Consultant Warpage risk assessment
Issue stackup drawing Consultant Formal fab document
First-article TDR verification Fabricator / Test lab Measured vs. modeled impedance

Frequently Asked Questions

How long does a stackup consultation take?

A standard 4–8 layer RF stackup review typically takes one to two business days once all inputs are provided. Complex hybrid builds with mixed dielectrics or unusual layer counts may take three to four days.

Can I use an online calculator instead of a consultation?

Online calculators give a useful starting point, but they usually assume ideal rectangular traces and nominal Dk. A consultation adds trapezoidal etch modeling, frequency-dependent Dk, manufacturer press tolerances, and loss analysis—factors that matter above 3 GHz.

What if my target impedance is not 50 Ω?

Consultations cover any target: 75 Ω for video, 90 Ω or 100 Ω differential for high-speed digital, or custom impedances for filter and coupler structures. The same field-solver workflow applies regardless of the target value.

Is my design data kept confidential?

Reputable consultants sign an NDA before reviewing any files. Confirm this is standard practice before sharing Gerber or ODB++ data, especially for defense or pre-patent designs.

Does the consultation include a stackup library reference?

Yes. The review cross-references proven stackup templates from an RF PCB stackup library to accelerate material and thickness selection, then customizes the template to your specific impedance and loss requirements.

Ready for a quotation?

Send your requirements for a material, stackup and manufacturing review. Price and schedule are confirmed for your project.

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