De-embedding Techniques | TRL, SOLT and 2x-Thru

What Is De-embedding and Why Does It Matter?

De-embedding is the process of mathematically removing unwanted contributions—cables, connectors, PCB launches and test fixtures—from a vector network analyzer (VNA) measurement so that only the true S-parameters of the device under test (DUT) remain. Without it, every measured insertion loss, return loss and group delay value includes the fixture’s own loss and mismatch, which can easily add 0.5–2 dB of error per port above 10 GHz. For any high-frequency or high-speed design that depends on accurate channel models, de-embedding is not optional—it is a prerequisite.

Three techniques dominate modern practice: TRL (Thru-Reflect-Line), SOLT (Short-Open-Load-Thru) and 2x-Thru. Each trades off calibration complexity, bandwidth and residual error differently. The sections below break down how each works, when to choose it, and the pitfalls that trip up even experienced engineers.

The Error Model: What You Are Removing

A two-port VNA measurement contains twelve systematic error terms (forward and reverse directivity, source match, load match, reflection and transmission tracking, and isolation). A full two-port calibration corrects all twelve terms at the coaxial reference plane—the end of the cable. Everything between that plane and the DUT is the fixture, and its effect folds into the measured data unless you de-embed it.

Fixture contributions include:

• Insertion loss from trace length, dielectric loss (Df) and conductor roughness on the test board.
• Impedance discontinuities at the connector-to-microstrip launch, via transitions and any impedance taper.
• Mismatch ripple caused by reflections bouncing between the connector and the DUT pads.

De-embedding assigns the fixture a known S-parameter matrix and divides (in the T-parameter domain) or cascades it out of the measured result. The accuracy of the final DUT data therefore depends entirely on how well you characterize the fixture—which is where the choice of technique matters.

TRL De-embedding: The Gold Standard

How TRL Works

TRL uses three on-board standards—a zero-length or short Thru, a highly reflective Reflect (open or short), and one or more Lines of known impedance but unknown loss. The VNA solves for the fixture error boxes on each side of the DUT from these three measurements alone, without needing a precisely known load impedance. Because the reference impedance is set by the line’s characteristic impedance, TRL is self-calibrating and inherently suited to planar media such as microstrip and stripline.

Frequency Coverage and Line Lengths

Each Line standard is valid over roughly an 8:1 bandwidth—specifically where the electrical length of the Line minus the Thru is between 20° and 160° at the measurement frequency. For broader coverage you cascade multiple line lengths. A common set for 1–40 GHz on a 50 Ω microstrip (effective εᵣ ≈ 2.9) might use lines of 5.0 mm, 15.0 mm and 45.0 mm excess length relative to the Thru, each covering roughly one octave-plus band.

When to Choose TRL

• You need the lowest residual error and can design the calibration structures onto the test board.
• The DUT is a planar component (filter, coupler, amplifier) whose fixture is a PCB trace.
• You are working above 5 GHz where load-match uncertainty in SOLT becomes significant.

TRL’s main limitation is that it requires board real estate for the line standards, and the lines must maintain uniform impedance. Any etching variation or laminate Dk tolerance shifts the reference impedance and introduces systematic error. Designing a clean TRL coupon is itself a skill—see our RF test fixture design guide for layout rules.

SOLT De-embedding: Familiar but Limited

How SOLT Works

SOLT relies on four physical standards—Short, Open, Load (50 Ω) and Thru—whose electrical models are fully characterized by the calibration-kit manufacturer. The VNA uses these known models to solve the twelve-term error model. SOLT is the default calibration shipped with nearly every coaxial cal kit and is well understood from VNA calibration training.

Limitations on PCB Fixtures

SOLT works well at the coaxial plane, but extending it onto a PCB is problematic. Building a precision 50 Ω load on FR-4 or even Rogers RO4350B that holds ±0.5 Ω up to 20 GHz is extremely difficult. The open standard’s fringing capacitance changes with substrate thickness and ground clearance, making its model board-dependent. For these reasons, SOLT is rarely used as the primary on-board de-embedding method above about 6 GHz. It remains the right choice when:

• Measurements stay below 6 GHz and coaxial-plane calibration accuracy is sufficient.
• The fixture is a simple coaxial adapter or short cable whose S-parameters are provided by the manufacturer.
• You need a quick sanity check before committing to a TRL or 2x-Thru flow.

2x-Thru De-embedding: Speed Meets Accuracy

How 2x-Thru Works

The 2x-Thru method (also called the Thru-only method) requires a single test structure: a transmission line that is exactly twice the length of one fixture half, with no DUT in between. The algorithm splits this “2x-Thru” measurement at its midpoint—using time-domain gating or eigenvalue decomposition—to extract the S-parameters of each fixture half. Those halves are then de-embedded from the DUT measurement. The technique was formalized in the IEEE 370 standard (IEEE 370-2020), which specifies both the test-coupon geometry and the mathematical procedure.

Why 2x-Thru Is Gaining Ground

Compared with TRL, 2x-Thru needs only one standard instead of three or more, saving board space and measurement time. Compared with SOLT, it avoids the need for precision on-board loads. The method works from DC to the frequency where the fixture half-length is still electrically resolvable—typically well past 50 GHz on low-loss laminates. For a deeper walkthrough of the measurement flow, see our dedicated 2x-Thru de-embedding article.

Practical Constraints

• Symmetry assumption. The baseline IEEE 370 algorithm assumes the two fixture halves are identical. Asymmetric fixtures (different connector types on each side, different trace routing) require the AFR (Automatic Fixture Removal) extension, which adds a Reflect measurement.
• Thru length. The 2x-Thru line must be long enough that the time-domain responses of the two launches do not overlap. A minimum of 5–8 mm total length is typical for SMA launches; for shorter fixtures, a higher-bandwidth VNA setting (finer time resolution) helps.
• Causality enforcement. Good implementations enforce passivity and causality on the extracted fixture model. If your tool does not, watch for non-physical negative group delay or gain in the de-embedded result.

Comparison: TRL vs SOLT vs 2x-Thru

Step-by-Step: Running a 2x-Thru De-embed

1. Design the coupon. Place a 2x-Thru line on the same panel as the DUT board, using identical connectors, launches and stackup. Keep the line uniform—no vias, no bends within the fixture region.
2. Calibrate the VNA. Perform a full two-port SOLT or eCal calibration at the cable ends. Set the frequency span to cover DC (or as low as possible) through at least 1.5× your maximum frequency of interest, with fine frequency steps (≤10 MHz) for clean time-domain gating.
3. Measure the 2x-Thru. Connect the 2x-Thru coupon and acquire the four S-parameters (S11, S21, S12, S22). Save as Touchstone (.s2p).
4. Measure the DUT. Replace the coupon with the DUT board and acquire its S-parameters under the same VNA state. Save as .s2p.
5. Run the de-embedding. In your post-processing tool (Keysight ADS, Ansys Circuit, or open-source implementations of IEEE 370), load both files, select the 2x-Thru algorithm, and extract the DUT-only S-parameters.
6. Validate. Check that the de-embedded Thru (DUT replaced by a known line) shows near-zero insertion loss and flat group delay. Any residual ripple indicates fixture asymmetry or calibration drift.

Engineers running EM-correlated measurements in tools like Keysight ADS Momentum or Ansys HFSS for PCB analysis can import the de-embedded .s2p directly into their simulation environment to close the measurement-to-model loop.

Common Pitfalls and How to Avoid Them

1. Fixture Asymmetry Ignored

If the two halves of your fixture differ—perhaps one side has a longer trace or a different connector—using the basic 2x-Thru split will inject error. Either redesign for symmetry or switch to the AFR variant, which adds a single Reflect measurement to resolve both halves independently.

2. Insufficient Time-Domain Separation

When the 2x-Thru line is too short, the time-domain impulse responses of the two launches merge and the algorithm cannot separate them. Rule of thumb: the one-way propagation delay through the line should be at least 1.5× the duration of the launch’s impulse response. On a microstrip with εᵣ,eff ≈ 3.0, that translates to roughly 10 mm of line for an SMA edge-launch connector.

3. Dk and Loss Variation Between Coupon and DUT

If the 2x-Thru coupon is fabricated on a different panel or uses a different layer than the DUT, dielectric constant and loss tangent differences will corrupt the fixture model. Always place the coupon on the same panel, same layer, and ideally within 50 mm of the DUT site.

4. Neglecting the Return-Loss Floor

After de-embedding, check the DUT’s return loss. If it exceeds the raw fixture return loss, the de-embedding has likely amplified noise. This happens when the fixture’s own mismatch is close to the VNA’s dynamic range floor. Improving the fixture match (better launch design, impedance-controlled traces) is the real fix—no amount of math compensates for a poor fixture.

When Simulation Replaces Measurement De-embedding

Full-wave EM simulation can generate the fixture’s S-parameter matrix directly, letting you de-embed in software without building physical calibration standards. This is increasingly common in CST Studio PCB workflows where the connector and launch geometry are modeled parametrically. The trade-off: simulation accuracy depends on having correct material properties (Dk, Df, copper roughness) and mesh convergence, which themselves need validation against a measured reference. In practice, the best correlation comes from combining a measured 2x-Thru with a simulated fixture model and reconciling the two.

Choosing the Right Technique

Choose TRL when you need the lowest possible uncertainty, you control the test-board layout, and you can allocate space for multiple line standards. TRL is the reference method against which others are benchmarked.

Choose SOLT when your measurements are at the coaxial plane or below 6 GHz, and you already have a manufacturer-characterized cal kit. Do not attempt SOLT with on-board standards above 6 GHz unless you have modeled and verified each standard.

Choose 2x-Thru when you want fast, board-level de-embedding with minimal coupon area, especially for high-speed serial channels (PCIe Gen 5/6, 112G PAM4) or broadband RF fixtures. The IEEE 370-2020 standard provides a well-defined procedure and open-source reference code.

FAQ

Can I de-embed with only one-port measurements?

Yes, but only for one-port DUTs (e.g., an antenna or termination). You measure the fixture’s one-port reflection with a known load and subtract it. For two-port devices, you need full two-port data from both the fixture and the DUT.

Does de-embedding work for differential (4-port) measurements?

Yes. Both TRL and 2x-Thru extend to mixed-mode (differential/common-mode) S-parameters. IEEE 370 explicitly covers 4-port de-embedding. The 2x-Thru coupon becomes a differential pair, and the algorithm processes all 16 S-parameters simultaneously.

What residual error should I expect after de-embedding?

With a well-designed TRL, residual insertion-loss uncertainty can be below ±0.02 dB per port at 20 GHz. A good 2x-Thru de-embed typically achieves ±0.05 dB. SOLT on-board de-embedding is rarely better than ±0.10 dB above 6 GHz because of load and open-standard uncertainty.

Is de-embedding the same as port extension?

No. Port extension adds a lossless, matched delay to shift the reference plane—it corrects phase but not loss or mismatch. De-embedding removes the full S-parameter matrix of the fixture, including loss, mismatch and mode conversion. Port extension is a rough first approximation; de-embedding is the complete solution.

Where can I find open-source 2x-Thru de-embedding code?

The IEEE 370 working group published reference Python code alongside the standard. The scikit-rf library (an open-source RF engineering toolkit) also includes an IEEE 370 de-embedding module that accepts Touchstone files directly.