Stripline Impedance Calculator | Symmetric & Offset

What Is Stripline Impedance and Why Calculate It?

Stripline is a flat conductor sandwiched between two parallel ground planes, separated by a homogeneous dielectric. Its characteristic impedance Z₀ depends on trace width, copper thickness, the distance to each ground plane, and the dielectric constant (Dk) of the laminate. Calculating Z₀ accurately before layout is the single most effective way to prevent reflections, maintain signal integrity, and meet the ±10 % or tighter tolerance windows that IPC-2141 controlled-impedance guidelines recommend for RF and high-speed digital interconnects.

Unlike microstrip, stripline is fully shielded by copper reference planes on both sides. This makes it inherently lower in radiation loss and crosstalk—two qualities that matter in dense multilayer RF boards operating above 1 GHz. The trade-off is that stripline traces sit on inner layers, so impedance depends on dielectric thickness control during lamination, a variable the designer must budget for up front.

Symmetric vs. Offset Stripline

Symmetric (centered) stripline

The trace sits exactly midway between the two ground planes. If the total ground-to-ground spacing is b, each dielectric half is b/2. This is the simplest case to manufacture and model, and it is the default geometry most fabricators quote when you specify “stripline” without qualification.

Offset (asymmetric) stripline

The trace is closer to one ground plane than the other. This happens routinely in real stackups: a six-layer board with signal on layer 3, ground on layers 2 and 5, will almost never be symmetric. Offset stripline has a slightly different impedance for the same trace width, and the closer ground plane dominates the field pattern. You must account for both dielectric thicknesses independently.

Stripline Impedance Calculator

Enter your dielectric constant, trace width (W), copper thickness (t), and the distances to each ground plane below. The tool returns the characteristic impedance for both symmetric and offset configurations so you can compare stackup options side by side.

A common starting point: with RO4350B (Dk 3.48), a 10 mil (0.254 mm) wide trace, 0.7 mil copper, and 20 mil total ground spacing centered, you will see roughly 50 Ω. Widening the trace to 12 mil drops impedance to about 43 Ω, while narrowing to 8 mil pushes it near 58 Ω. These shifts illustrate how sensitive stripline Z₀ is to trace width—about 1.5–2 Ω per mil in this geometry range. If you need a differential stripline pair, the coupling gap adds another degree of freedom.

Key Formulas Behind the Calculator

Symmetric stripline (Cohn approximation)

The classic closed-form for a zero-thickness conductor is:

Z₀ = (60 / √εr) · ln [ 4b / (π · d · W_e) ]

where b is the ground-plane spacing, W_e is the effective width corrected for finite copper thickness, and εr is the substrate Dk. The effective width correction is:

W_e = W + (t / π) · [1 + ln(4πW / t)] for W/b ≥ 0.35

Offset stripline

When the trace is at distances h₁ and h₂ from the two ground planes (h₁ + h₂ + t = b), the impedance can be estimated by treating each half as an independent stripline-to-ground and combining them in parallel:

1/C_total = 1/C₁ + 1/C₂ (capacitance per unit length from each ground plane)

Practical 2-D field solvers and the calculator above use numerical techniques that handle fringing fields more accurately than any single closed-form, especially for W/b ratios below 0.2 or above 0.6.

Variables That Shift Your Impedance

Dielectric constant (Dk)

Impedance scales roughly with 1/√εr. Moving from FR-4 (Dk ≈ 4.2 at 1 GHz) to Megtron 6 (Dk ≈ 3.4) raises Z₀ by about 11 % for the same geometry. Always use the Dk value at your operating frequency and confirm it against the laminate vendor’s Dk-vs-frequency curve—Dk can drift 3–5 % between 100 MHz and 10 GHz on standard materials.

Trace width (W)

The dominant lever. Wider traces lower impedance; narrower traces raise it. Fabrication etching tolerance is typically ±0.5 mil (±12.7 µm) on inner layers, which translates directly into impedance variation. For a 5 mil trace on a tight 50 Ω stripline, that ±0.5 mil swing alone can cause ±4 Ω variation.

Copper thickness (t)

Thicker copper slightly lowers impedance by increasing the effective width. Going from ½ oz (17 µm) to 1 oz (35 µm) copper on a 10 mil wide, 50 Ω stripline shifts Z₀ down roughly 1–2 Ω. The effect is small but not negligible in tight-tolerance designs.

Ground-plane spacing (b, h₁, h₂)

Increasing the distance between ground planes raises impedance because the capacitance per unit length drops. Prepreg thickness control during lamination is typically ±0.5–1.0 mil, and this directly modulates impedance. Requesting tighter dielectric tolerance from your fabricator is one of the most effective ways to hit ±5 % impedance windows.

Impedance Tolerance Feasibility

Specifying ±5 % on a 50 Ω stripline means the fabricator must hold Z₀ between 47.5 and 52.5 Ω across the entire panel. Enter your target impedance and tolerance below to see whether your chosen geometry, material Dk tolerance, and etch tolerance can realistically achieve the window.

If the tool flags your tolerance as marginal, the first remedies are: widen the trace (a 10 mil trace is more forgiving than a 5 mil trace), choose a laminate with tighter Dk tolerance (±2 % vs. ±5 %), and add impedance coupons to every production panel so the fabricator can verify with TDR before shipping. For designs routed on inner layers where conductor loss from skin effect is also a concern, balancing width against loss becomes a two-variable optimization.

Practical Design Guidelines

• Keep W/b between 0.2 and 0.6. Below 0.2 the trace is very narrow and sensitive to etch variation; above 0.6 the fields crowd and higher-order modes can appear at high frequencies.
• Ground-plane continuity matters. Stripline assumes two solid reference planes. Slots, splits, or sparse ground pours under the trace destroy the return path and invalidate any impedance calculation. Use the via parasitics calculator to evaluate ground-via stitching around signal transitions.
• Account for via transitions. Every signal via that passes from stripline to another layer introduces parasitic inductance and capacitance. Anti-pads, back-drilled stubs, and ground-via fences all affect the impedance at the transition point.
• Material choice drives Df as much as Dk. A low-Dk laminate like Rogers RO4350B (Df 0.0037 at 10 GHz) keeps both impedance predictable and insertion loss low—critical for stripline runs longer than a few centimeters at X-band and above.
• Simulate, don’t just calculate. Closed-form calculators are excellent for initial sizing. For final verification—especially on offset stripline near bends, pads, or vias—run a 2-D cross-section solver in your EDA tool to capture fringing and etch-profile effects.

Stripline vs. Other Transmission Lines

Stripline is one of several transmission-line geometries available in a multilayer PCB. Choosing the right one depends on frequency, isolation needs, and layer availability.

For grounded coplanar waveguide routing on outer layers, try the GCPW impedance calculator. If your design uses air-gap or partially filled dielectrics, the suspended substrate stripline calculator handles that specialized case.

FAQ

What is a typical 50 Ω stripline width?

On FR-4 (Dk ≈ 4.2) with a 20 mil ground-to-ground spacing, a centered stripline needs roughly 8–9 mil trace width for 50 Ω. On lower-Dk laminates like RO4350B (Dk 3.48), the width increases to about 10–11 mil for the same spacing.

Does offset stripline have worse performance than symmetric?

Not inherently. Offset stripline has the same low radiation and good shielding. The main difference is that the impedance calculation must account for two different dielectric heights, and the return-current distribution between the two ground planes is unequal. Performance is equivalent as long as impedance is correctly targeted.

How do I verify stripline impedance after fabrication?

Time-domain reflectometry (TDR) on impedance test coupons is the standard method, per IPC-TM-650, Method 2.5.5.7. Coupons should be on every production panel and match the signal-layer stackup exactly.

Can I route stripline on FR-4 for RF above 5 GHz?

FR-4 becomes lossy above 2–3 GHz (Df ≈ 0.020 at 10 GHz), so stripline runs at X-band and beyond suffer significant insertion loss. For frequencies above 5 GHz, low-loss laminates (Df < 0.005) such as Megtron 6, RO4350B, or RO4003C are strongly preferred.

What is the maximum frequency for stripline?

Stripline supports a TEM mode with no cutoff, but higher-order waveguide modes can propagate when the ground-plane spacing exceeds roughly λ/2 in the dielectric. At 30 GHz on Dk 3.5 material, this limits spacing to about 85 mil (2.16 mm). Keeping the spacing well below this threshold ensures single-mode operation.