
What Is a Radar Altimeter PCB?
A radar altimeter PCB is the radio-frequency circuit board inside an aircraft’s radio altimeter (also called a radar altimeter or radalt). It generates, transmits, and receives FMCW signals in the 4.2–4.4 GHz aeronautical band to measure the aircraft’s absolute height above terrain. The board carries the voltage-controlled oscillator (VCO), power amplifier, low-noise amplifier (LNA), mixer, IF chain, and often the transmit and receive patch antennas—all on a single multilayer substrate that must meet aviation environmental and certification requirements.
Because the altimeter output directly feeds autopilot, ground-proximity warning (GPWS), and autoland systems, a failed or degraded board is a flight-safety event. That reality drives every material, layout, and qualification decision discussed below.
Operating Frequency and Regulatory Context

Radio altimeters worldwide operate between 4.2 GHz and 4.4 GHz, a band protected by FCC regulations and ITU Radio Regulations specifically for aeronautical radionavigation. The 200 MHz bandwidth supports FMCW chirps with range resolutions on the order of 0.75 m (c / 2B), though practical altimeters use sweep bandwidths of 100–150 MHz for 0–2,500 ft AGL measurement with sub-foot accuracy after signal processing.
The 4.3 GHz center frequency sits in C-band, where free-space wavelength is approximately 70 mm. Quarter-wave structures on the PCB are roughly 10–12 mm long in a typical Dk ≈ 3.5 laminate, making the board compact enough for a line-replaceable unit (LRU) that fits behind the belly radome of a commercial aircraft.
Material Selection for 4.3 GHz Altimeter Boards
Why Standard FR-4 Falls Short
At 4.3 GHz, standard FR-4 exhibits a dissipation factor (Df) of roughly 0.020–0.025, translating to insertion losses of 0.5–0.7 dB/cm for a 50 Ω microstrip on 10 mil (0.254 mm) dielectric. That level of loss degrades the noise figure of the receive chain and wastes transmit power—unacceptable when the altimeter must detect weak returns from smooth water surfaces at 2,500 ft. FR-4’s Dk also drifts with temperature and moisture, shifting trace impedance in flight.
Preferred Laminates
| Laminate | Dk (4 GHz, process direction) | Df (4 GHz) | Tg / Td (°C) | Typical Use |
|---|---|---|---|---|
| Rogers RO4350B | 3.48 ± 0.05 | 0.0037 | 280 / 390 | RF front-end, antenna feed |
| Rogers RO4003C | 3.38 ± 0.05 | 0.0027 | 280 / 390 | Low-loss filter, coupler |
| Isola Astra MT77 | 3.00 ± 0.04 | 0.0017 | 200 / 360 | Ultra-low-loss feed network |
| Taconic TLY-5 | 2.20 ± 0.02 | 0.0009 | N/A (PTFE) | Antenna element substrate |
Rogers RO4350B is the workhorse choice for most radar altimeter PCBs because it processes on standard FR-4 equipment (no special PTFE handling), offers tight Dk tolerance for impedance control, and withstands lead-free reflow. For the antenna substrates, a lower-Dk PTFE material like Taconic TLY-5 provides wider microstrip lines and lower radiation Q, improving bandwidth to cover the full 200 MHz allocation.
Hybrid Stackup: Mixing RF and Digital
A modern altimeter LRU integrates an FPGA or DSP for beat-frequency processing alongside the RF front end. A hybrid stackup bonds RF laminate cores for the top two layers (antenna and transmission lines) to mid-stack FR-4 or low-loss thermoset cores for digital routing and power distribution. The bonding prepreg must be compatible with both materials—Rogers 4450F or Isola 185HR prepreg are common choices. Registering dissimilar cores during lamination requires tight process control; CTE mismatch in z-axis between PTFE (≈ 280 ppm/°C) and FR-4 (≈ 60 ppm/°C) can crack vias if not managed with proper via-fill and annular-ring design.
Stackup Architecture
A representative six-layer radar altimeter PCB stackup, from top to bottom:
- Layer 1 – RF signal / antenna: RO4350B, 10 mil core. Microstrip traces and patch elements.
- Layer 2 – Ground plane: Continuous copper, stitched with via fences around transmission lines.
- Layer 3 – IF / analog signal: Low-loss prepreg bond, FR-4 or RO4350B core (8 mil). Carries IF traces, bias lines.
- Layer 4 – Power plane: Split power islands for +5 V, +3.3 V, VCO tuning voltage.
- Layer 5 – Digital signal: FR-4 core (8 mil). FPGA I/O, SPI buses, ARINC 429 interface.
- Layer 6 – Ground plane: Continuous copper, chassis-ground connection.
Keeping the RF layer on top avoids drilling through the RF dielectric for digital vias, preserving ground-plane integrity. The ground plane directly beneath the RF layer must be unbroken under every transmission line; even a single return-path slot raises insertion loss and radiates. Via stitching along both sides of every microstrip at λ/20 spacing (≈ 3.5 mm at 4.3 GHz) suppresses parallel-plate modes.
Similar hybrid stackup principles apply to other radar frequency bands. Weather radar transceiver boards operating in X-band and C-band face comparable laminate-bonding challenges, while ADAS sensor boards at 77 GHz push these constraints even further with thinner dielectrics and tighter tolerances.
Layout and Routing Guidelines
Transmission-Line Geometry
At 4.3 GHz on 10 mil RO4350B (Dk = 3.48, 1 oz copper), a 50 Ω microstrip is approximately 22 mil (0.56 mm) wide. A grounded coplanar waveguide (GCPW) with 8 mil gaps offers better mode control and easier transitions to connectorized test ports. Maintain ±0.5 mil etch tolerance to keep impedance within ±2 Ω of the 50 Ω target—this requires the fabricator to use laser direct imaging (LDI) rather than film-based exposure.
Component Placement
- VCO: Place close to the power amplifier to minimize trace length and phase noise degradation. Surround with a via-fence enclosure or shielding can.
- LNA: Locate immediately after the receive antenna feed to minimize the noise figure contribution of interconnect loss. Every 0.1 dB of loss before the LNA adds 0.1 dB to the system noise figure.
- Mixer: Position between the LNA and the IF filter. Keep LO and RF ports on separate sides of the component to maximize port-to-port isolation.
- Bypass capacitors: Place 100 pF and 10 nF capacitors within 0.5 mm of each active device power pin, with vias directly to the ground plane beneath—no trace routing to the via.
Antenna Integration
Many altimeters use separate transmit and receive patch antennas printed directly on the PCB. A 4.3 GHz patch on RO4350B (Dk = 3.48) has a resonant dimension of approximately 17.5 mm. For the typical ±40° beamwidth needed to illuminate terrain below the aircraft, a 2×2 or 4×1 array suffices. Tx-Rx isolation of at least 40 dB is required; achieve this through physical separation (> 2λ₀ ≈ 140 mm), orthogonal polarization, or a combination of both. Ground-plane slots or electromagnetic bandgap (EBG) structures between the arrays can add 5–10 dB of additional isolation.
These antenna-integration techniques share common ground with other radar applications. Marine radar boards also integrate patch arrays on similar laminates, though at X-band frequencies where element dimensions shrink proportionally.
Aviation Environmental Qualification

DO-160G Testing
RTCA DO-160G (Environmental Conditions and Test Procedures for Airborne Equipment) defines the environmental envelope every altimeter PCB must survive. Key sections that stress the board:
| DO-160G Section | Test | Typical Condition | PCB Impact |
|---|---|---|---|
| 4.0 | Temperature and altitude | −55 °C to +70 °C, 55,000 ft | CTE mismatch stress on vias and solder joints |
| 5.0 | Temperature variation | Rapid ramp, 10 °C/min | Delamination risk at hybrid-laminate interfaces |
| 7.0 | Operational shock and crash safety | 6 g, 11 ms half-sine | Heavy connector and component retention |
| 8.0 | Vibration | Sinusoidal and random, category S2 | Fatigue cracking at BGA and QFN solder joints |
| 22.0 | Lightning induced transient susceptibility | Pin injection, multiple waveforms | ESD/TVS protection on all I/O lines |
| 25.0 | Electrostatic discharge | ±15 kV air, ±8 kV contact | Grounding strategy and ESD clamping |
Conformal Coating and Moisture Resistance
Altimeter boards are conformally coated—typically with a silicone or parylene coating—to survive humidity, salt fog, and condensation at altitude transitions. The coating must not shift the Dk seen by microstrip lines; a 25 µm silicone layer (Dk ≈ 2.7) over a microstrip raises effective Dk by roughly 1–2 %, which should be accounted for in the electromagnetic simulation before layout release.
Reliability and Qualification Standards
Beyond DO-160G environmental testing, the PCB fabrication itself must comply with IPC-6012DS (space and military addendum) or IPC-6012 Class 3 at minimum. Class 3 mandates tighter annular ring, copper thickness, and hole-wall quality than commercial Class 2 boards. For defense-program altimeters, AS9100 quality management and ITAR compliance add traceability requirements to every lot of laminate and every plating bath.
Manufacturing Considerations
Drilling and Via Fill
Blind and buried vias are common in hybrid stackups. Laser-drilled microvias from Layer 1 to Layer 2 keep the RF ground plane intact while providing component grounding. All vias under QFN thermal pads should be filled and planarized (IPC-4761 Type VII) to prevent solder wicking during reflow, which would starve the joint and create a latent field failure.
Surface Finish
Electroless nickel / immersion gold (ENIG) is the default for altimeter boards: it provides a flat, solderable, corrosion-resistant surface compatible with wire bonding if bare-die MMICs are used. The nickel layer, however, is ferromagnetic and adds loss at microwave frequencies; keep the nickel thickness to 3–5 µm and the gold to 0.05–0.1 µm. Where loss is critical—antenna elements, filter resonators—consider immersion silver or OSP with a protective conformal coat applied immediately after assembly.
Impedance and Coupon Testing
Every production panel should include TDR coupons for 50 Ω microstrip and GCPW. The acceptance window is typically ±5 Ω for aviation boards. Additionally, a dedicated RF coupon—a through line of known length—can be measured on a VNA to verify insertion loss per unit length against the laminate datasheet value, catching any laminate-lot Dk drift before boards ship.
FMCW Signal Chain on the PCB
The radar altimeter’s FMCW signal chain maps directly onto the PCB layout:
- Chirp generation: A PLL/VCO synthesizes a linear frequency sweep across 4.2–4.4 GHz (or a sub-band thereof). Phase-noise performance of the VCO is critical; layout the loop filter with short, shielded traces and a local ground island.
- Transmit path: A driver amplifier and PA raise the chirp to +20 to +27 dBm. Thermal management under the PA—multiple filled vias to an internal copper plane or a coin-embedded heat slug—keeps junction temperature stable.
- Receive path: The reflected chirp enters the LNA (noise figure ≈ 1.5 dB), is mixed with a sample of the transmit chirp, and produces a beat-frequency IF signal proportional to altitude. The IF bandwidth is typically 10 kHz to 1 MHz, low enough that the IF traces can run on inner FR-4 layers without concern for RF loss.
- Digital processing: An ADC digitizes the IF; an FPGA performs FFT-based range extraction and outputs altitude data over ARINC 429 or ARINC 717 to the aircraft’s avionics bus.
The same FMCW architecture, scaled to different frequencies, appears in 79 GHz imaging radar boards for automotive and industrial sensing, where the PCB challenges intensify with shorter wavelengths and tighter trace tolerances.
Common Design Pitfalls
- Ignoring conformal-coat Dk shift: Simulating the bare board and then coating it shifts antenna resonance by 50–100 MHz—enough to move the passband edge into the altimeter band.
- Inadequate Tx-Rx isolation: Coupling below 40 dB causes the receiver to saturate or creates a false close-range return. Verify isolation with a full-wave simulation that includes the radome and mounting structure.
- Via stub resonance: A through-hole via from Layer 1 to Layer 6 creates a stub from Layer 2 to Layer 6 that resonates near 4 GHz in a typical 62 mil stackup. Use back-drilled or blind vias to eliminate the stub.
- Thermal cycling via cracks: PTFE cores expand far more in z than FR-4. If the stackup mixes both, specify via fill and cap plating, and run 500-cycle thermal-shock testing (−55 °C to +125 °C) on qualification coupons.
Frequently Asked Questions
What frequency does a radar altimeter PCB operate at?
Radar altimeters operate in the 4.2–4.4 GHz band, reserved globally for aeronautical radionavigation. The PCB must support FMCW transmission and reception across this 200 MHz allocation.
Can FR-4 be used for a radar altimeter board?
FR-4 can carry the digital and low-frequency IF sections, but its high loss tangent (Df ≈ 0.020 at 4 GHz) and unstable Dk make it unsuitable for the RF front-end and antenna layers. A hybrid stackup with RF laminate on top and FR-4 internally is the standard approach.
What certification does a radar altimeter PCB need?
The finished altimeter unit must pass RTCA DO-160G environmental testing. The PCB itself should be fabricated to IPC-6012 Class 3 or IPC-6012DS, and the manufacturer’s quality system should hold AS9100 certification for aerospace traceability.
How is Tx-Rx isolation achieved on an altimeter board?
Isolation of 40 dB or more is achieved through physical antenna separation (> 2λ₀), orthogonal polarization between transmit and receive patches, via-fence shielding walls, and sometimes electromagnetic bandgap structures etched into the ground plane between the two arrays.
Why is via back-drilling important at 4.3 GHz?
A through-hole via in a 62 mil board creates a stub that resonates near 4 GHz, causing a notch in the transmission response. Back-drilling removes the unused stub portion, eliminating the resonance and keeping insertion loss flat across the altimeter band.
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