
Gerber, ODB++, and IPC-2581: What Each Format Actually Delivers
Gerber (RS-274X / X2) transmits copper, mask, and drill artwork as flat image layers with no embedded netlist, stackup, or component data. ODB++ bundles netlist, component placement, layer stackup, and artwork into a single archive with full design intent. IPC-2581 does the same in an open, vendor-neutral XML schema standardized by the IPC-2581 Consortium. For any RF or high-reliability PCB, the choice of ODB++ IPC-2581 PCB format directly affects how much manual reconstruction the fabricator must do—and how many errors slip through.
Format-by-Format Comparison

| Capability | Gerber X2 / RS-274X | ODB++ v8 | IPC-2581 Rev C |
|---|---|---|---|
| Copper / mask artwork | Yes | Yes | Yes |
| Embedded netlist | No (X2 partial) | Yes | Yes |
| Component placement (XY, rotation) | Separate file | Yes | Yes |
| Layer stackup with materials | No | Yes | Yes |
| Impedance requirements per net | No | Yes | Yes |
| BOM integration | No | Partial | Yes |
| Vendor-neutral standard | Yes (Ucamco) | No (Siemens/Mentor) | Yes (IPC) |
| Typical file count for 8-layer board | 20-30+ files | 1 archive | 1 XML file |
| CAD tool support | Universal | Wide (Xpedition, Allegro, Altium, KiCad 8+) | Growing (Allegro, Zuken, Altium) |
Why Gerber Still Dominates—and Where It Fails
Gerber RS-274X is universally supported: every CAM tool on the planet reads it. For simple two- or four-layer FR-4 boards with standard stackups, Gerber works fine because the fabricator already knows the recipe. The problems surface on complex RF builds:
- No netlist means no electrical DRC at the fab. The CAM engineer cannot verify that a 50 Ω microstrip net is correctly cleared from adjacent ground unless they manually re-enter impedance targets.
- Stackup is communicated in a separate PDF or fab note. If the note says “RO4350B core, 6.6 mil” but the Gerber trace widths were calculated for 10 mil prepreg, nobody catches the mismatch automatically.
- Drill files are separate Excellon files. Mis-matched drill-to-copper registration is the number-one cause of annular ring violations on bonded multilayer PTFE boards.
- Pick-and-place data lives in yet another file. Coordinate origin mismatches between Gerber and centroid files cause assembly placement errors, especially on boards with edge-launch connector footprints that have tight positional tolerances.
Gerber X2 improved things by adding attribute metadata (layer function, polarity, .FileFunction headers), but it still lacks a netlist and stackup definition. It is a better Gerber, not an intelligent format.
Gerber Upload Preflight
Before sending Gerber files, run them through a preflight check to catch missing layers, unmatched drill files, and aperture errors. Enter your layer count and expected file list below to see what is missing.
A common result: the preflight flags a missing solderpaste layer or an Excellon file whose units header says inches while the Gerber is in millimeters. Fixing these before submission saves a full review cycle—typically 24–48 hours on an RF prototype order. If you consistently see five or more warnings, consider switching to an intelligent format.
ODB++: Full Intelligence, Proprietary Ownership
ODB++ was created by Valor (now part of Siemens) and packs the complete design database—netlist, stackup, component data, test points, impedance classes—into a structured directory compressed as a .tgz archive. A fabricator receiving ODB++ can import it into Valor Genesis or InCAM and immediately run DFM checks against the actual netlist, not a reconstructed guess.
For RF PCBs this is transformative. The impedance table travels with the data, so the CAM tool can cross-check that a 50 Ω differential pair on RO4350B (Dk 3.48 ± 0.05 at 10 GHz) has the correct trace width and spacing for the stated stackup. If the designer specified a 4.5 mil trace on 6.6 mil core and the solver says that yields 52.3 Ω, the discrepancy is flagged before tooling.
The downside is governance. ODB++ is controlled by Siemens. While many EDA tools export it—Altium Designer’s ODB++ output, Cadence Allegro, and KiCad 8—the specification is not an open standard. Fabricators who want the latest parser features depend on Siemens licensing.
IPC-2581: The Open Alternative
IPC-2581 (formally IPC/DPMX) is an open XML-based standard maintained by IPC. Revision C, released in 2020, covers everything ODB++ does—artwork, netlist, BOM, stackup, assembly data—in a single .cvg or .xml file. Because IPC governs the spec, no single vendor controls it.
Adoption has been slower than ODB++ for a practical reason: fewer CAM systems natively import IPC-2581 with full fidelity. Zuken CR-8000 and Cadence Allegro have strong exporters; on the receiving side, tools like Frontline (Orbotech) and Ucamco Integr8tor handle it well, but smaller shops may still need to convert to Gerber internally. That conversion step can strip the very intelligence the format was designed to preserve.
When IPC-2581 Wins
- Multi-vendor supply chain. If you qualify two or three fabricators for a MIL-PRF-31032 qualified build, an open standard avoids locking everyone into one toolchain.
- Full BOM-to-board traceability. IPC-2581 can embed component MPNs and approved alternates, which matters for builds requiring IPC Class 3 and 3A traceability.
- Long-term archival. XML is human-readable and self-documenting. A Gerber archive from 2005 may need detective work to reconstruct; an IPC-2581 file is self-describing.
Choosing the Right Format for RF and High-Reliability PCBs

Do not hedge—here is the decision framework:
- Choose Gerber X2 when your fabricator explicitly requests it, the board is ≤ 4 layers on a single dielectric, and you have no controlled-impedance nets. Always include a detailed fab drawing and stackup table.
- Choose ODB++ when your fab and assembly house both support it, the board has controlled impedance on RF laminates, and you want automated DFM and netlist verification at the fab. This is the pragmatic best choice for most RF prototypes today.
- Choose IPC-2581 when you need vendor-neutral data exchange across multiple qualified suppliers, when your program requires open-standard archival (common in defense and space), or when your EDA tool’s IPC-2581 exporter is mature (Allegro, CR-8000).
IPC Standards and Acceptance Criteria
Regardless of file format, the finished board must meet acceptance criteria defined in IPC-6012 for rigid boards or IPC-6013 for flex. The file format determines how efficiently the fabricator can verify compliance during CAM review, not what the compliance targets are.
Use the explorer below to check common IPC-A-600 visual acceptance criteria—annular ring, plating voids, laminate defects—and understand which defect classes apply to your build.
For example, an annular ring breakout that is acceptable under IPC-A-600 Class 2 (≥ 90° of remaining ring) would be a reject under Class 3 (no breakout allowed on external layers). If your ODB++ or IPC-2581 file carries the class designation, the fab’s automated inspection can apply the correct rule set without manual override. With Gerber, the class is stated only in the fab note, and if someone misreads “Class 3” as “Class 2,” the wrong acceptance window is applied.
Practical Tips for Submitting Intelligent Data
- Export and re-import. Before sending ODB++ or IPC-2581, re-import the exported file into a viewer (Valor Free Viewer, Altium Web Viewer) and verify that the netlist, stackup, and impedance tables survived the round trip.
- Include a Gerber fallback. Some assembly houses lag behind fabs in format support. Shipping both ODB++ and Gerber ensures the assembly line is not blocked.
- Lock the stackup in the file, not just the PDF. If you designed for Rogers RO3003G2 with Dk 3.00 at 10 GHz, that material callout should be in the stackup definition inside the intelligent file, not only in a separate drawing.
- Specify impedance targets per net class. “50 Ω ± 10 %” on a fab note is fine; embedding it in the ODB++ impedance table lets the fab’s field solver confirm it against the actual geometry and material.
- Use the IPC-2221 generic design standard as your baseline. It defines conductor spacing, annular ring, and hole-to-copper clearances that your intelligent file should already satisfy before export.
FAQ
Can I send ODB++ and IPC-2581 together?
Yes, but it is redundant. Send one intelligent format plus a Gerber backup. The fab will use whichever their CAM system handles best and cross-check against the other if needed.
Does KiCad support ODB++ or IPC-2581?
KiCad 8 added an ODB++ exporter. IPC-2581 export is available through third-party plugins but is not yet native. For most KiCad users, ODB++ is now the recommended intelligent output.
Is Gerber going away?
Not soon. Gerber X2 is actively maintained by Ucamco and remains the universal fallback. What is changing is that more fabs prefer—or require—an intelligent format for complex boards, especially controlled-impedance RF designs above 6 GHz.
What file format is best for 77 GHz automotive radar PCBs?
ODB++ or IPC-2581, because these boards use tight-tolerance laminates (e.g., RO3003 Dk 3.00 ± 0.04), require precise impedance control, and go through multiple qualified suppliers. The intelligent format carries the impedance and material data that Gerber cannot.
Do intelligent formats reduce quoting time?
Typically yes. A fab receiving ODB++ can auto-extract layer count, board outline, drill count, impedance classes, and material callouts without parsing a PDF. This can cut front-end engineering time by 30–50 % on complex stackups, reducing both NRE cost and quote turnaround.
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