RF PCB Manufacturing Capabilities

Wire Bondable Gold PCB for MMIC Carrier Boards

Wire bondable gold PCB finishes demand electrolytic or electroless gold of exceptional purity and smoothness to ensure reliable thermosonic or thermocompression bonds on MMIC carrier boards and hybrid microwave modules.

Gold wire bonds connecting a bare MMIC die to microstrip traces on a carrier board

What Makes a PCB Wire Bondable Gold?

A wire bondable gold PCB uses a high-purity gold finish—typically ≥ 99.9 % Au—over a nickel or nickel-palladium barrier, with surface roughness low enough to form reliable metallurgical bonds with gold or aluminum wire. Standard surface finishes like ENIG (electroless nickel / immersion gold) deposit only 2–6 µin (0.05–0.15 µm) of gold, which is far too thin for wire bonding. Wire bondable finishes start at 30 µin (0.76 µm) and often reach 50–100 µin (1.27–2.54 µm) of electrolytic soft gold, giving the bonding tool enough compliant metal to form a proper ball or wedge bond. This distinction is critical for MMIC carrier boards, hybrid microwave modules, and any RF assembly where bare die attach and wire interconnection replace solder-reflowed packaged parts.

Why Wire Bonding Matters in RF and Microwave PCBs

Cross-section of copper-nickel-gold plating stack on a wire bondable PCB pad

Packaged MMICs introduce parasitic inductance from bond wires inside the package, lead frames, and solder joints—often totaling 0.3–1.0 nH per connection. Above 20 GHz these parasitics degrade return loss and shift matching networks unpredictably. Mounting a bare die directly onto a carrier board and wire bonding its pads to the board’s transmission lines eliminates the package entirely, cutting interconnect inductance to 0.1–0.3 nH per bond and keeping the signal path under the designer’s control. Applications that routinely demand wire bondable gold PCBs include:

  • Ka-band and V-band satellite transponder modules (26–75 GHz)
  • Millimeter-wave radar front ends for automotive and defense
  • GaN and GaAs power amplifier pallets for electronic warfare
  • Medical imaging RF subsystems with bare-die LNAs
  • Space-qualified hybrid assemblies under ECSS and NASA outgassing requirements

Gold Finish Specifications for Wire Bonding

Electrolytic Hard Gold vs. Electrolytic Soft Gold

Hard gold (Type I per ASTM B488) is alloyed with cobalt or nickel to reach 130–200 HV Knoop hardness. It resists wear on edge connectors but its grain structure and co-deposited impurities make it a poor wire bonding surface—pull strengths drop and cratering risk rises. Soft gold (Type III, sometimes called “bondable gold”) is ≥ 99.9 % pure, with hardness of 60–90 HV Knoop and a fine, ductile grain that deforms readily under the ultrasonic energy of a thermosonic capillary. For wire bonding, always specify soft gold.

Thickness, Roughness, and Barrier Layer

Parameter Typical Wire Bond Spec Why It Matters
Gold purity ≥ 99.9 % Au Impurities block intermetallic formation
Gold thickness 30–100 µin (0.76–2.54 µm) Must supply enough compliant metal for ball deformation
Surface roughness (Ra) ≤ 10–25 µin (0.25–0.64 µm) Rough surfaces trap contaminants and scatter ultrasonic energy
Nickel barrier 100–250 µin (2.5–6.4 µm) electrolytic Ni Prevents copper migration into gold; supports die shear loads
Knoop hardness (Au) 60–90 HV Soft enough for reliable first-bond deformation
Co/Ni content in Au < 0.1 % by weight Higher levels embrittle the bond interface

Some programs add a palladium strike (2–8 µin) between nickel and gold to act as a diffusion barrier during high-temperature die attach (> 300 °C eutectic or epoxy cure). This Ni/Pd/Au stack is increasingly common on MIL-PRF-31032 qualified RF boards where long storage life before assembly is required.

Substrate and Stackup Considerations

Choosing the Right Laminate

Wire bondable gold carrier boards must survive die-attach temperatures (often 150–320 °C) without delamination or z-axis expansion that cracks the die. Common substrate choices include:

  • Alumina (Al₂O₃) thin-film substrates — the traditional hybrid choice, CTE-matched to GaAs (≈ 6.5 ppm/°C) and GaN-on-SiC (≈ 4.5 ppm/°C). Not a PCB, but often combined with PCB daughter cards.
  • Rogers RO4350B or RO4003C — thermoset laminates with Dk 3.48 / 3.38, stable to 280 °C reflow, and CTE around 10–14 ppm/°C in-plane. Usable for lower-power wire-bonded assemblies where CTE mismatch stress is managed with compliant die attach adhesive.
  • Rogers RT/duroid 6002 — PTFE/glass with Dk 2.94, very low loss at millimeter-wave, but PTFE’s high CTE (24 ppm/°C z-axis) demands careful thermal management.
  • Aluminum-core or copper-core metal-backed laminates — provide a heat sink directly under the die pad, common in GaN PA pallets.

Whichever laminate you choose, work with your fabricator on the RF PCB stackup design early—die-attach pad copper weight, via thermal relief patterns, and gold plating current paths all interact.

Die Pad and Transmission Line Layout

The die pad (also called the die flag or eutectic pad) should be a solid copper pour, typically 2 oz (70 µm) or heavier, plated with the full Ni/Au stack. Thermal vias under the pad—arrayed at 15–20 mil (0.38–0.51 mm) pitch—conduct heat to an internal or back-side ground plane. Keep bond-finger pitch ≥ 4 mil (100 µm) for 1.0 mil (25 µm) gold wire and ≥ 6 mil (150 µm) for 1.5 mil aluminum wedge bonds. Bond fingers should be at least 8 mil × 8 mil (200 µm × 200 µm) to give the capillary adequate landing area.

Transmission lines connecting to the MMIC should maintain controlled impedance right up to the bond-wire landing pad. A common technique is to narrow the microstrip from 50 Ω down to a higher-impedance section that partially compensates for the bond-wire inductance—essentially a low-pass matching network printed into the trace. Precise etch compensation on these narrow traces is essential to hit the target width within ± 0.5 mil.

Plating Process and Quality Control

Hybrid microwave module with wire-bonded bare die on gold-finished carrier board

Selective Plating vs. Pattern Plating

Plating the entire board surface with 50 µin of soft gold would be prohibitively expensive and would also deposit gold on areas intended for solder, where gold embrittlement of solder joints becomes a concern above 3 % Au by weight. Two approaches avoid this:

  • Selective electrolytic plating — a photo-defined resist mask exposes only the bond pads and die flags. Gold is electroplated through the mask, then the resist is stripped. This is the most common method for wire bondable gold PCBs.
  • Spot plating / brush plating — a localized anode deposits gold on individual pads. Used for rework or very small production runs.

After plating, remaining solder-land areas receive a standard finish—ENIG, immersion tin, or OSP—in a second process step. Coordinating these dual finishes adds cost and lead time, so flag this requirement at the quoting stage.

Inspection and Acceptance Criteria

Wire bondable gold pads are inspected to criteria drawn from IPC-4552/4553 series surface finish standards and MIL-STD-883 (Test Method 2010 for wire bond pull, 2019 for die shear). Key checks include:

  • Gold thickness — measured by XRF (X-ray fluorescence) at a minimum of three sites per pad type.
  • Nickel thickness and phosphorus content — mid-phosphorus Ni (6–9 % P) is standard; high-P Ni can be too hard and low-P Ni too magnetic for some MMIC applications.
  • Surface roughness — profilometer or white-light interferometer measurement; Ra ≤ 15 µin is a safe target.
  • Bond pull testing — first-article boards are wire bonded and pull-tested per MIL-STD-883 TM 2011. A minimum pull strength of 3.0 gf for 1.0 mil Au wire is typical; most programs require ≥ 5.0 gf average with no lifts or cratering.
  • Visual inspection — no pits, nodules, staining, or resist residue on bond pads. Contamination from handling oils is a frequent cause of first-bond non-sticks.

Programs governed by IPC Class 3 or Class 3/A requirements impose tighter sampling and zero-defect accept criteria on these inspections.

Common Pitfalls and How to Avoid Them

Gold Contamination and Storage

Wire bondable gold surfaces are far more sensitive to contamination than solder pads. Organic films as thin as a few monolayers—from handling, flux vapor, or outgassing adhesives—block the ultrasonic weld. Best practices:

  • Vacuum-seal boards in nitrogen within 24 hours of final gold plating.
  • Limit shelf life to 6 months before bonding; re-bake and UV/ozone clean if exceeded.
  • Never touch bond pads—use only vacuum wands or ESD-safe tweezers at board edges.

CTE Mismatch and Die Cracking

A GaAs die (CTE ≈ 5.7 ppm/°C) mounted on FR-4 (CTE ≈ 14–17 ppm/°C in-plane) with rigid eutectic solder will crack during thermal cycling. Either choose a CTE-matched substrate, use a compliant silver-filled epoxy die attach (which adds 0.1–0.3 °C/W thermal resistance), or insert a CTE-matched heat spreader (CuW, CuMo, or AlN) between die and board.

Bond Wire Compensation at Millimeter-Wave

A 1.0 mil gold bond wire 15 mil (0.38 mm) long presents roughly 0.15 nH of series inductance. At 40 GHz this is about j37 Ω—enough to ruin a match designed on a simulator that ignored it. Model every bond wire as a transmission line segment (not a lumped inductor) above 30 GHz, and add ribbon bonds or multiple parallel wires for lower inductance when the frequency demands it. Rogers RO4000 series application notes include useful guidance on transition modeling.

Design File and Fabrication Checklist

Before releasing Gerber or ODB++ files for a wire bondable gold RF PCB, verify these items:

  1. Bond pad locations, sizes, and pitch annotated on a fabrication drawing layer—do not rely on the plater to guess which pads need bondable gold.
  2. Selective plating mask clearly defined (separate Gerber layer or drawing note).
  3. Gold type (soft, Type III), thickness range, and hardness range specified in the fab notes.
  4. Nickel barrier thickness and phosphorus content range stated.
  5. Surface finish for non-bonded areas called out separately.
  6. Thermal via array under die pads dimensioned (via diameter, pitch, fill or cap requirement).
  7. Impedance table includes the traces leading to bond fingers, with the plating stackup accounted for in the impedance calculation.
  8. Cleanliness and packaging requirements noted (nitrogen seal, desiccant, shelf-life label).

Submitting a complete data package avoids re-spins. A DFM review focused on RF boards will catch plating-current imbalances and pad-geometry issues before tooling begins.

Frequently Asked Questions

Can ENIG be used for wire bonding?

Standard ENIG deposits only 2–6 µin of immersion gold, which is consumed during the bonding process, exposing the brittle nickel-phosphorus layer underneath. This leads to unreliable bonds and frequent pad cratering. ENIG is not suitable for wire bonding; specify electrolytic soft gold ≥ 30 µin instead.

What is the minimum gold thickness for thermosonic ball bonding?

Most wire bonder manufacturers and MIL-STD-883 guidelines recommend a minimum of 30 µin (0.76 µm) of soft gold for thermosonic ball bonding with 1.0 mil Au wire. For aluminum wedge bonding onto gold pads, 50 µin is a safer minimum because the wedge tool exerts higher shear forces.

Does wire bondable gold add significant cost to an RF PCB?

Yes. Electrolytic soft gold is substantially more expensive than ENIG or immersion tin, both in material (gold price per troy ounce) and process time (selective plating, dual-finish handling). The cost impact depends on total gold area and thickness, but expect the finish alone to add a meaningful premium—often the single largest line item after the high-frequency laminate itself. Minimizing bond-pad area through careful layout directly reduces gold consumption.

How do I specify wire bondable gold in my fab drawing?

Include a surface-finish note such as: “Bond pads per detail A: electrolytic soft gold (≥ 99.9 % Au, Type III per ASTM B488), 50 ± 10 µin over 150 ± 50 µin electrolytic nickel. Knoop hardness ≤ 90 HV. Surface roughness Ra ≤ 15 µin.” Provide a separate Gerber layer or cross-hatched drawing callout identifying which pads receive this finish.

Is wire bondable gold compatible with lead-free reflow?

The gold itself withstands reflow temperatures (peak 260 °C for SAC305). However, if non-bonded pads on the same board go through reflow, flux residues can contaminate nearby bond pads. Use a no-clean flux with low residue and schedule wire bonding after all reflow steps, followed by a plasma or UV/ozone clean of the bond surfaces.

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