Depth Control Milling PCB: Process & Design Guide

What Is Depth Control Milling PCB Fabrication?

Depth control milling PCB fabrication (also called controlled-depth routing or Z-axis milling) is a mechanical process that removes laminate material to a programmed depth without penetrating the next copper reference plane. It is the primary method for creating RF cavities that seat bare-die MMICs, recessed component pockets that lower overall module height, and stepped board outlines for edge-connector interfaces. Typical depth tolerances in production range from ±2 mil (±50 µm) on rigid FR-4 to ±1 mil (±25 µm) on dimensionally stable PTFE-based laminates like Rogers RO4350B (Dk 3.48) or RT/duroid 5880 (Dk 2.20).

Why RF and Microwave Designs Need Depth Control Milling

In a standard surface-mount flow, an MMIC die or MEMS filter sits on top of the board, and its bond wires arc upward—adding parasitic inductance that degrades performance above 20 GHz. Milling a pocket into the PCB lets the die sit flush with or below the surface plane, shortening wire bonds to under 250 µm and cutting loop inductance by 30–50 %. The cavity floor also becomes a direct thermal path when it exposes an internal copper ground plane, which is critical for GaN power amplifiers dissipating several watts per square centimeter.

Beyond die attach, depth control milling serves several other RF functions:

• Waveguide channels — substrate-integrated waveguide (SIW) transitions at 60–77 GHz sometimes use milled troughs to set the correct waveguide height.
• Shielding-can seats — a shallow recess (typically 0.15–0.30 mm deep) provides a mechanical register for RF shielding can enclosures, improving solder-joint coplanarity and EMI seal.
• Step-profiled edges — stepped board outlines create mating shelves for gold-finger edge connectors used in backplane and test-fixture interfaces.
• Back-drilling stubs — controlled-depth drilling removes via stubs that cause resonant nulls above 10 GHz, a related Z-axis-controlled process sharing the same machine platform.

How the Depth Control Milling PCB Process Works

1. Stackup and Target-Depth Definition

The design file specifies the milling outline (X-Y contour) and the target remaining thickness—usually measured from the cavity floor to the nearest copper layer below it. For a 62 mil (1.57 mm) board with a 10 mil core above an internal ground plane, a cavity that exposes that ground requires removing roughly 52 mil of material, leaving the 0.5 oz copper plane plus any prepreg adhesion layer.

2. Machine Setup and Z-Reference

CNC routers use one of three Z-axis reference methods:

Copper-foil sensing is the gold standard for depth control milling PCB cavities: the spindle plunges until the cutter contacts the target copper layer and a conductivity circuit triggers a stop. This makes the process largely independent of dielectric thickness variation—a significant advantage on PTFE materials whose pressed thickness can vary ±2 mil panel to panel.

3. Cutter Selection and Speeds

Flat-end carbide mills in 0.8–2.0 mm diameters are standard. Smaller cutters resolve tighter corner radii (important when the cavity must closely match a die outline) but reduce feed rate. For PTFE and ceramic-filled laminates, diamond-coated or PCD (polycrystalline diamond) cutters prevent the gummy fiber pull-out that carbide tools can cause. Spindle speeds of 40,000–60,000 RPM with feed rates of 0.5–1.5 m/min are typical; too fast a feed leaves a rough floor that impairs epoxy die-attach wetting.

4. Post-Mill Inspection

Remaining-thickness measurement uses a calibrated dial indicator or non-contact laser profilometer. IPC Class 3 and Class 3A builds require 100 % cavity-depth verification per IPC-6012 §3.6, with all readings logged and traceable.

Design Rules and Tolerances for Depth Control Milling PCB Cavities

Getting a reliable cavity starts in the stackup design, not on the CNC machine. Key rules:

• Minimum remaining dielectric — keep at least 3 mil (75 µm) of dielectric above the target copper layer to avoid micro-cracking. If the intent is to fully expose copper (e.g., a thermal pad), specify copper-foil sensing and accept a ±0.5 mil tolerance on copper surface exposure.
• Minimum cavity width — 1.0 mm for standard tooling; 0.5 mm achievable with micro-end-mills but at higher cost and slower throughput.
• Corner radii — equal to half the cutter diameter. A 1.0 mm cutter leaves a 0.5 mm inside corner radius. If the die outline demands sharp corners, a secondary plunge cut or laser finishing is needed.
• Keep-out from cavity edge to nearest via or trace — 0.25 mm minimum to prevent delamination propagation; 0.50 mm recommended for PTFE boards.
• Panel-level thickness uniformity — request incoming laminate with ≤ ±1.5 % thickness tolerance if using programmed-plunge (non-sensing) depth control.

Etch compensation also matters: traces near the cavity perimeter experience asymmetric etching during the inner-layer process, and trapezoidal trace profiles can shift impedance by 1–3 Ω if not accounted for in the artwork.

Scoring vs. Routing: Choosing the Right Separation Method

Depth control milling often coexists with other panel-separation techniques. V-score (scoring) cuts a V-groove to a controlled remaining web thickness, while tab routing uses full-depth cuts with breakaway tabs. The choice affects board stress, edge quality, and RF performance near board margins.

For RF boards on PTFE substrates, router-based depaneling is almost always preferred over scoring because the brittle ceramic filler in materials like RO3003 or RO3006 fractures unpredictably under V-score snap. Use the selector below to compare scoring and routing for your specific board outline and material.

If the tool recommends routing and your design also includes recessed features, combining full-depth outline routing with depth control milling in a single CNC program saves a handling step and improves registration between the cavity and the board edge—important when the cavity must align to an external waveguide flange within ±50 µm.

High-Speed Signal Routing Near Milled Cavities

Milled cavities remove dielectric and sometimes copper, which changes the local impedance environment. A 50 Ω microstrip trace routed across a region where the dielectric below has been thinned by a cavity on the opposite side of the board will see a lower effective Dk and a higher characteristic impedance—potentially jumping to 55–60 Ω and creating a reflection visible on a TDR plot.

Mitigation Strategies

1. Route signals around cavities, not over or under them, wherever layout space allows.
2. Add a local ground pour on the cavity floor layer to restore the reference plane continuity.
3. Widen the trace in the affected zone to compensate for the reduced Dk, recalculating width with the thinner dielectric value.
4. Use stripline instead of microstrip for critical RF paths so both reference planes remain intact regardless of surface milling.

These considerations apply equally to high-speed digital links such as PCIe Gen 4/5 lanes, where impedance discontinuities of even 5 Ω can violate the channel’s return-loss mask. If your board routes PCIe near a milled feature, check the lane assignments and coupling rules with the assistant below.

A realistic example: a PCIe Gen 4 x4 link routed on a 6-layer hybrid stackup (RO4350B signal layers, FR-4 core) passes 8 mm from a cavity milled for a transceiver die pocket. The assistant flags that the differential pair’s reference void exceeds 1× trace width—prompting the designer to add stitching vias and a coplanar ground fill to close the gap, keeping insertion loss within the –8 dB budget at 8 GHz (PCIe Gen 4 Nyquist).

Material Considerations for Depth Control Milling PCB Laminates

Not all laminates mill equally. The table below summarizes machinability factors relevant to controlled-depth work.

Hybrid stackups—where a PTFE signal layer is bonded to an FR-4 core with a thermoplastic prepreg like Rogers CuClad 6700—require the CNC program to adjust feed rate at the material boundary. A sudden transition from hard glass-epoxy to soft PTFE can cause the cutter to plunge past the target if the feed is not reduced in time.

Common Defects and How to Prevent Them

Cavity-Floor Roughness

A rough floor (Ra > 1.6 µm) impairs die-attach epoxy wetting and increases void percentage under the die. Cause: worn cutter or excessive feed rate. Fix: replace cutters every 500–800 hits on FR-4, every 200–400 hits on ceramic-filled PTFE; reduce feed to 0.8 m/min or below.

Delamination at Cavity Perimeter

The cutter’s lateral force can peel back the top copper foil at the cavity edge, especially on PTFE boards with lower peel strength (as low as 4 lb/in on unroughened copper). Fix: use a climb-milling tool path (cutter rotation matches feed direction) and ensure the copper is micro-etched or oxide-treated before lamination.

Depth Overshoot

Overshooting into the target copper layer nicks traces or shorts planes. Cause: incorrect Z-offset calibration or panel warpage. Fix: use vacuum hold-down fixtures to flatten panels, and re-zero the Z-reference at multiple points across the panel (every 150 mm recommended).

DFM Checklist for Depth Control Milling PCB Designs

Before releasing Gerber and drill files, run through this checklist—or request a free DFM review to catch issues early.

1. Cavity depth and remaining-thickness tolerance clearly noted in the fabrication drawing (not just in the Gerber).
2. Target copper layer for sensing identified by layer number and copper weight.
3. Corner radii ≥ half the specified cutter diameter; sharp corners flagged for secondary operation.
4. Keep-out zone of ≥ 0.25 mm from cavity edge to nearest via, trace or pad.
5. No high-speed differential pairs routed directly above or below the cavity without impedance re-calculation.
6. Panel array drawing shows cavity locations relative to tooling holes and fiducials.
7. Material callout includes laminate vendor, grade and stackup table with nominal and tolerance thicknesses per layer.

Frequently Asked Questions

What depth tolerance can I expect for depth control milling on PTFE laminates?

With copper-foil sensing, ±0.5 mil (±13 µm) is achievable on ceramic-filled PTFE like RO4350B. Without sensing (programmed plunge only), expect ±1.5–2.0 mil due to laminate thickness variation.

Can I mill a cavity on both sides of the same board?

Yes, but the remaining core between opposing cavities must be thick enough to survive handling—generally ≥ 10 mil (0.25 mm) of dielectric plus at least one copper plane. Double-sided cavities require flipping the panel, so registration between the two sides depends on tooling-hole accuracy (typically ±1 mil).

Is depth control milling the same as back drilling?

Both are Z-axis-controlled operations on the same CNC platform, but back drilling removes via stubs with a standard drill bit, while depth control milling removes area material with an end-mill cutter. They share calibration methods and can be programmed in the same job file.

How does a milled cavity affect RF shielding?

A cavity that removes the top copper ground pour creates a gap in the Faraday cage. Restoring shielding requires either a lid soldered or glued over the cavity, a press-fit shield can seated in a recessed shelf, or plated cavity walls acting as a five-sided enclosure.

Does depth control milling add significant cost?

It adds a CNC routing step (or extends an existing one) and requires 100 % depth inspection on Class 3 builds. For a typical 4-cavity panel, expect the milling operation to add 10–20 % to the bare-board fabrication cost, depending on cavity count, size and tolerance tier.