Pure PTFE PCB | Lowest-Loss Unreinforced Fabrication

What Is a Pure PTFE PCB?

A pure PTFE PCB is built on an unreinforced polytetrafluoroethylene substrate—no woven glass or ceramic filler is added to the dielectric. This gives the material the lowest dissipation factor (Df) available in commercial laminates, typically 0.0004–0.0009 at 10 GHz, and an exceptionally stable dielectric constant (Dk) in the range of 2.10–2.20. When every tenth of a dB matters—above 40 GHz in Ka-band radar, satellite transponders, or vector-network-analyzer calibration substrates—pure PTFE is the default choice.

The trade-off is mechanical: without glass reinforcement, the substrate is soft, dimensionally unstable under thermal stress, and difficult to drill and plate. Every step from panel handling to final depaneling demands process controls that go well beyond standard FR-4 or even glass-reinforced PTFE fabrication.

Key Material Grades and Properties

The table below compares widely specified pure (unreinforced) PTFE laminates against a representative glass-reinforced grade for context. All values are at 10 GHz per manufacturer datasheets.

RT/duroid 5880 is often grouped with pure PTFE because its random glass-microfiber loading is minimal and non-woven, giving it electrical behavior very close to unreinforced grades. Truly filler-free products like Taconic TLY-5 push Df even lower but sacrifice the slight dimensional stability that random microfiber provides. Check available thicknesses on the RF laminate thickness chart before committing to a stackup.

Why Df Matters More at Millimeter-Wave

Conductor loss and dielectric loss both rise with frequency, but dielectric loss scales roughly linearly with frequency while conductor loss scales with the square root. Above about 30 GHz, dielectric loss becomes the dominant contributor in microstrip. A laminate with Df = 0.0009 at 10 GHz will contribute roughly 0.15 dB/cm of dielectric loss at 77 GHz on a 5 mil (0.127 mm) substrate, whereas a woven-glass PTFE with Df = 0.0020 would contribute about 0.33 dB/cm under the same conditions. Over a 10 cm feed network that difference is 1.8 dB—enough to erase the gain of an entire amplifier stage.

Pairing pure PTFE with HVLP copper foil further reduces conductor loss by keeping surface roughness below 1 µm Rz, which matters because the skin depth at 77 GHz in copper is only about 0.24 µm.

Fabrication Challenges Unique to Pure PTFE

Drilling and Hole Quality

Pure PTFE is soft (Shore D hardness ≈ 55) and has almost no rigidity. Mechanical drilling tends to push the material rather than cut it, producing smeared hole walls, raised burrs, and oversized holes. Best practices include:

• Use entry and backer materials specifically rated for soft substrates; aluminum entry boards help dissipate heat.
• Reduce spindle speed to 40,000–60,000 rpm (versus 80,000+ for FR-4) and increase chip load to keep the bit cutting rather than rubbing.
• Limit stack height to one or two panels to avoid z-axis deflection.
• For microvias under 0.2 mm (8 mil), laser drilling with a UV or CO₂ source gives cleaner sidewalls and eliminates mechanical smear entirely.

Plated-Through-Hole Reliability

The z-axis CTE of unreinforced PTFE is 240–280 ppm/°C—roughly ten times that of FR-4. During reflow soldering (peak 260 °C for lead-free), a 1.6 mm board can expand by more than 50 µm in thickness. That expansion stresses the copper barrel in every plated-through hole. Mitigation strategies:

• Specify electrodeposited copper plating ≥ 25 µm (1 mil) minimum barrel thickness per IPC-6012 Class 3.
• Use filled and capped vias where the design allows, to add structural support to the barrel.
• Limit the number of thermal excursions; pure PTFE boards should survive at least three reflow cycles if plating quality is controlled, but six or more cycles significantly raise the risk of barrel cracking.

Via Current Capacity on Soft Substrates

Because PTFE’s thermal conductivity is low (≈ 0.20 W/m·K, roughly half that of FR-4), heat generated by current flowing through a via dissipates slowly. When sizing power-feed vias on a pure PTFE board, derate the current capacity compared to FR-4 rules of thumb. Enter your via dimensions, copper plating thickness, and allowable temperature rise in the calculator below to get a thermal-aware estimate.

For example, a via with a 0.3 mm finished hole, 25 µm plating, and a 10 °C rise allowance might handle roughly 1.0 A on FR-4 but should be derated to about 0.7–0.8 A on pure PTFE due to the poorer heat spreading. If the result exceeds your comfort margin, add parallel vias or increase plating thickness rather than enlarging the hole—larger holes on soft PTFE are harder to plate uniformly.

Surface Preparation and Adhesion

PTFE is chemically inert, which is exactly why its Df is so low—but that same inertness makes copper adhesion difficult. The standard process is sodium-naphthalene etching (also called plasma or chemical surface modification), which roughens the PTFE surface at a molecular level to create mechanical keying for the copper. Skipping or under-processing this step is the single most common cause of delamination on pure PTFE boards.

After copper plating, the surface finish itself contributes to loss. For the lowest insertion loss at mmWave frequencies, immersion silver is preferred over ENIG because the nickel barrier layer in ENIG is ferromagnetic and adds measurable loss above 20 GHz.

Routing and Depaneling

Scoring and V-grooving are not recommended for pure PTFE panels because the soft substrate tears rather than snapping cleanly. Controlled-depth routing with a single-flute carbide bit, or laser depaneling, produces the cleanest edges and avoids micro-cracking near trace terminations.

When to Choose Pure PTFE vs. Alternatives

Pure PTFE is not always the right call. The decision tree below covers the most common scenarios.

Design Guidelines for Pure PTFE Stackups

Single and Double-Sided

Most pure PTFE designs are single-sided or double-sided with a continuous ground plane. Standard thicknesses are 5, 10, 15, 20, 31, and 62 mil (0.127–1.575 mm). For mmWave microstrip, 5 or 10 mil cores are typical to keep the line width narrow enough for dense layouts while maintaining 50 Ω impedance—on a Dk 2.20 substrate, a 50 Ω microstrip on 5 mil is approximately 15.3 mil (0.39 mm) wide.

Multilayer Considerations

Building a true multilayer stackup entirely from pure PTFE is possible but rarely practical above two signal layers. The softness makes layer-to-layer registration difficult, and the high z-CTE punishes every additional via. A more reliable approach is a hybrid stackup: pure PTFE outer layers for the RF signal path bonded to a dimensionally stable core such as RO4350B or FR-4 for power and digital routing. Consult the RF laminate stock list to confirm bonding-film compatibility before finalizing a hybrid stackup.

Copper Weight and Loss

Half-ounce (18 µm) copper is the standard starting foil for pure PTFE laminates. Thicker copper reduces conductor loss marginally at lower frequencies but offers no benefit above about 20 GHz where the skin depth is well within the first few micrometers. If the design carries significant DC or pulsed current—such as bias tees or power dividers—consider thick copper RF PCB construction on the power layers of a hybrid stackup rather than increasing foil weight on the PTFE layers.

Storage and Handling

Unreinforced PTFE laminates absorb almost no moisture (water absorption < 0.02%), which is one reason Dk remains stable. However, the soft panels scratch easily, and surface contamination from fingerprints can interfere with the sodium-naphthalene etch. Store panels vertically in sealed moisture-barrier bags, handle with lint-free gloves, and process within the laminate manufacturer’s recommended shelf life—typically 12 months from date of manufacture for copper-clad PTFE, per Rogers advanced electronics documentation.

Inspection and Acceptance

IPC-6012 Class 3 is the baseline for high-reliability pure PTFE boards. Key inspection points beyond standard PCB acceptance include:

• Peel strength: ≥ 4.0 lb/in (0.70 N/mm) after thermal stress, per IPC-TM-650 method 2.4.8.
• Plating void check: Cross-section at least three vias per coupon; no voids exceeding 10% of barrel circumference.
• Dk verification: Resonant-cavity or split-post dielectric measurement on a coupon from the production panel, especially for instrumentation-grade boards.
• Dimensional tolerance: Hole location ±75 µm (±3 mil) is realistic for mechanically drilled pure PTFE; tighter tolerances require laser drilling or post-drill verification.

Frequently Asked Questions

Is pure PTFE the same as RT/duroid 5880?

Not exactly. RT/duroid 5880 contains randomly oriented glass microfibers for slight mechanical reinforcement, though its electrical performance is very close to truly filler-free PTFE grades like Taconic TLY-5. For the absolute lowest Df, specify a grade with no filler at all.

Can pure PTFE be used in multilayer RF stackups?

Yes, but hybrid construction—pure PTFE signal layers bonded to a rigid core—is far more practical and reliable than an all-PTFE multilayer. Registration and via reliability improve dramatically with a dimensionally stable inner core.

What frequency range benefits most from pure PTFE?

Pure PTFE delivers the greatest advantage above 30–40 GHz, where dielectric loss dominates total insertion loss. Below 10 GHz, glass-reinforced PTFE or hydrocarbon ceramic laminates often provide adequate performance at lower fabrication cost and complexity.

How does pure PTFE compare to liquid crystal polymer (LCP)?

LCP offers low Df (0.002–0.004 at 10 GHz) with much better dimensional stability and is suited to thin flex and rigid-flex constructions. Pure PTFE still wins on raw Df, but LCP is increasingly competitive for 5G mmWave modules where mechanical reliability and volume manufacturing matter more than the last 0.001 of Df.

What surface finish is best for pure PTFE at mmWave?

Immersion silver or bare copper (with OSP) gives the lowest loss. Avoid ENIG above 20 GHz because the nickel barrier layer adds measurable insertion loss due to its ferromagnetic properties.