High Frequency PCB Materials

I-Tera MT40 PCB | Low-Loss Digital & RF Boards

Isola I-Tera MT40 is a low-loss, glass-reinforced thermoset laminate designed for high-speed digital and RF/microwave PCBs. This guide covers its key electrical properties, fabrication considerations, stackup strategies, and how to calculate controlled impedance on I-Tera MT40 boards.

Cross-section of a multilayer I-Tera MT40 PCB showing copper and dielectric layers

What Is I-Tera MT40 and Why Use It?

Isola I-Tera MT40 is a thermoset, glass-reinforced laminate system with a dielectric constant (Dk) of approximately 3.45 and a dissipation factor (Df) of 0.0031 at 10 GHz. It bridges the gap between standard high-Tg FR-4 and premium PTFE-based microwave laminates, giving designers a cost-effective option for channels running from roughly 1 GHz up to 25 GHz and beyond. Its combination of low loss, excellent thermal stability (Tg around 200 °C by DSC), and conventional FR-4-style processing makes it a go-to choice for 10G/25G/56G SerDes links, backplane interconnects, and moderate-frequency RF front-ends.

Unlike pure PTFE substrates that require specialized drill bits and plasma desmear, I-Tera MT40 processes on standard epoxy-class lamination and drilling equipment. That single fact often cuts fabrication cost by 20–40 % compared with a Rogers or pure PTFE PCB of equivalent layer count, while delivering insertion loss performance that satisfies most data-rate and RF requirements below Ka-band.

Key Electrical and Mechanical Properties

High-speed backplane PCB with differential pair traces on low-loss laminate
Parameter Typical Value Test Condition / Standard
Dielectric Constant (Dk) 3.45 ± 0.05 10 GHz, IPC-TM-650 2.5.5.5
Dissipation Factor (Df) 0.0031 10 GHz, IPC-TM-650 2.5.5.5
Glass Transition (Tg) 200 °C DSC, IPC-TM-650 2.4.25
Decomposition Temperature (Td) 360 °C TGA, 5 % weight loss
CTE Z-axis (below Tg) 40 ppm/°C IPC-TM-650 2.4.24
Moisture Absorption 0.10 % IPC-TM-650 2.6.2.1
Flammability UL 94 V-0 —
Peel Strength (1 oz Cu) ≥ 6 lb/in (1.05 N/mm) After thermal stress
Available Core Thicknesses 2 mil – 62 mil (0.05 – 1.57 mm) —

The Df of 0.0031 at 10 GHz places I-Tera MT40 firmly in the “low-loss” category per IPC-4101 slash-sheet conventions, comparable to Panasonic Megtron 6 and a step below ultra-low-loss materials like Isola Tachyon 100G (Df ≈ 0.0020). Its Dk of 3.45 is close enough to standard FR-4 (≈ 4.2–4.5) that impedance-controlled traces are moderately wider, improving etch tolerance margins.

Where I-Tera MT40 Fits: Application Map

High-Speed Digital Backplanes and Servers

56 Gbps PAM-4 and 112 Gbps PAM-4 SerDes channels demand total channel insertion loss budgets on the order of −28 dB to −35 dB at Nyquist. I-Tera MT40’s low Df keeps dielectric loss manageable through 30+ inch traces, which is why it appears in OCP-class server backplanes and switch line cards. For channels pushing 224G PAM-4, designers typically step up to Megtron 8 or Tachyon 100G, but I-Tera MT40 remains the sweet spot for 56G-class links where cost pressure is real.

RF and Microwave Boards (1–25 GHz)

Base-station amplifier chains, small-cell radios, and radar IF boards operating below 25 GHz benefit from I-Tera MT40’s loss profile without the fabrication complexity of PTFE. For higher frequencies—say 77 GHz automotive radar—a dedicated microwave laminate like Isola IS680-AG or a glass-reinforced PTFE is the better call, because Df scales with frequency and even 0.003 becomes significant at millimeter-wave.

Test and Measurement Instrumentation

Oscilloscope front-ends, network-analyzer calibration boards, and high-speed probe interface PCBs often specify I-Tera MT40 for its tight Dk tolerance (±0.05), which translates directly into predictable impedance and phase matching across a wide bandwidth.

Comparing I-Tera MT40 with Other Isola Laminates

Isola offers a broad portfolio. The table below positions I-Tera MT40 against siblings you might also be evaluating. Use the Isola Material Selector tool afterward to narrow your choice based on your specific frequency, loss budget, and layer count.

Laminate Dk @ 10 GHz Df @ 10 GHz Tg (°C) Best Fit
I-Tera MT40 3.45 0.0031 200 56G digital, sub-25 GHz RF
Tachyon 100G 3.02 0.0020 200 112G/224G digital, low-loss RF
IS680-AG 2.80 0.0025 200 Microwave, mmWave RF
IS550H 4.00 0.0080 200 Standard high-Tg, halogen-free
Astra MT77 3.00 0.0017 200 77 GHz radar, 5G mmWave

If you need halogen-free compliance with moderate loss, Isola IS550H is a step up in Df but meets environmental directives. For ultra-low-loss digital links beyond 56G, Tachyon 100G is the natural upgrade path within Isola’s lineup.

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Fabrication and Processing Considerations

Lamination

I-Tera MT40 uses standard high-temperature press cycles similar to high-Tg FR-4. Typical lamination peak temperature is 375–385 °F (190–196 °C) with a dwell of 60–90 minutes under full vacuum. Because the resin system is thermoset (not thermoplastic like LCP), there is no risk of resin reflow during relamination in sequential builds.

Drilling

Standard carbide drill bits work well. The glass reinforcement is woven E-glass, so entry and exit burr control follows the same practices as FR-4. For microvias, UV-laser drilling at 355 nm or CO₂ at 9.4 µm both produce clean holes; CO₂ is more common for production volumes. Aspect ratios up to 12:1 are achievable with proper desmear.

Desmear and Plating

Permanganate desmear is effective on I-Tera MT40’s resin system—no plasma step required, unlike PTFE laminates. Electroless copper adhesion is strong thanks to the micro-roughened resin surface created during desmear, and peel strength after thermal stress meets or exceeds 6 lb/in (1.05 N/mm).

Hybrid Stackups

A common cost-optimization strategy is to use I-Tera MT40 only on the signal layers that carry high-speed or RF traces, while filling the remaining layers with a lower-cost high-Tg FR-4 like Isola 370HR. The key constraint is CTE matching: I-Tera MT40’s Z-axis CTE of 40 ppm/°C is close to many mid-Tg epoxies, so warpage risk is low if the stackup is symmetrical. Consult your fabricator’s DFM guidelines for bonding-sheet compatibility—Isola’s own I-Tera MT40 product data sheet lists recommended prepreg styles.

Stackup Design for I-Tera MT40

Hybrid stackup PCB combining low-loss and FR-4 laminates

Typical 8-Layer High-Speed Stackup

An 8-layer board targeting 56 Gbps PAM-4 might look like this:

  1. L1 – Signal (microstrip), 1 oz Cu, I-Tera MT40 core
  2. L2 – Ground plane
  3. L3 – Signal (stripline), ½ oz Cu, I-Tera MT40 core
  4. L4 – Power plane
  5. L5 – Power plane
  6. L6 – Signal (stripline), ½ oz Cu, I-Tera MT40 core
  7. L7 – Ground plane
  8. L8 – Signal (microstrip), 1 oz Cu, I-Tera MT40 core

The outer microstrip layers carry high-speed differential pairs with 100 Ω differential impedance. The inner stripline layers handle secondary high-speed routes with tighter coupling and better shielding. Ground planes on L2 and L7 provide uninterrupted return paths directly adjacent to every signal layer—this is non-negotiable for maintaining signal integrity at multi-GHz data rates.

Dielectric Thickness Selection

For a 50 Ω single-ended microstrip on I-Tera MT40 (Dk 3.45) with 1 oz (1.4 mil / 35 µm) copper, a dielectric height of roughly 4.0 mil (0.10 mm) yields a trace width near 7.0 mil (0.18 mm). That is wider than the same impedance on FR-4 (Dk ≈ 4.3), which means better etch tolerance and lower conductor loss due to the wider trace. Use the calculator below to dial in your own numbers.

Controlled Impedance on I-Tera MT40

Accurate impedance control starts with using the correct Dk value at the frequency of interest. Isola specifies Dk = 3.45 at 10 GHz, but at 1 GHz the effective Dk may be closer to 3.50 due to the glass-weave effect and resin content variation. Always confirm with your fabricator which Dk they use in their impedance modeling tool, and request a test coupon with TDR verification per industry-standard impedance calculation methods.

Enter your target impedance, copper weight, and dielectric thickness below to get a starting trace width for microstrip or stripline on I-Tera MT40. Set Dk to 3.45 for a 10 GHz design or 3.50 for a lower-frequency board.

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For example, a single-ended 50 Ω microstrip with 3.45 Dk, 4.5 mil dielectric, and 1 oz copper returns a trace width around 7.8 mil. That width is well within standard etch capability (±0.5 mil tolerance at most shops). If the calculator shows a trace narrower than 3.5 mil, consider increasing dielectric thickness or switching to stripline geometry to keep manufacturing yield high. For 100 Ω differential pairs, start with a 5 mil trace / 5 mil space pair and adjust from there.

Signal Integrity: Loss Budget Estimation

Total insertion loss on a PCB trace has three main contributors:

  • Dielectric loss – proportional to Df and frequency. At 14 GHz (Nyquist for 28 Gbps NRZ), I-Tera MT40 contributes roughly 0.35 dB/inch of dielectric loss in stripline.
  • Conductor loss – driven by copper roughness and skin effect. With standard oxide-alternative (Rz ≈ 3–5 µm) treatment, conductor loss at 14 GHz is approximately 0.25 dB/inch for a 5 mil wide stripline trace.
  • Via and connector transitions – typically 0.3–1.0 dB per transition depending on stub length and anti-pad design.

Summing these, a 10-inch stripline channel on I-Tera MT40 at 14 GHz loses about 6.0 dB from the trace alone—well within the equalization budget of modern 56G PAM-4 SerDes. For comparison, the same trace on standard FR-4 (Df ≈ 0.020) would lose roughly 12 dB, which is often unrecoverable.

Reducing Loss Further

If your loss budget is still too tight on I-Tera MT40, consider these steps before switching to a more expensive laminate:

  • Specify very-low-profile (VLP) copper foil (Rz ≤ 2 µm) to cut conductor loss by 15–20 %.
  • Widen traces—going from 4 mil to 5 mil reduces conductor loss noticeably at the cost of slightly thicker dielectric to maintain impedance.
  • Shorten the channel by placing connectors closer together or using mid-board optics.

Design Checklist for I-Tera MT40 PCBs

  1. Confirm Dk/Df values at your operating frequency with the Isola product family datasheets; do not assume 10 GHz numbers apply at 28 GHz.
  2. Specify copper foil roughness (standard, low-profile, or VLP) on your fab drawing—it affects both impedance and loss.
  3. Use symmetrical stackups to minimize warpage, especially on boards thinner than 62 mil (1.57 mm).
  4. Request TDR coupons on every production panel; target ±5 % impedance tolerance for high-speed differential pairs.
  5. For hybrid builds with FR-4, verify prepreg compatibility and CTE match with your fabricator before layout.
  6. Add back-drill or controlled-depth drill for through-hole vias on signal layers to eliminate stubs above 10 GHz.
  7. Run a 2D field-solver extraction (not a formula approximation) for final impedance and coupling values.

Frequently Asked Questions

Is I-Tera MT40 suitable for RF applications above 20 GHz?

It can work up to roughly 25 GHz for short traces with modest loss budgets. Above that, dielectric loss rises steeply, and materials like Isola Astra MT77 (Df 0.0017) or IS680-AG (Df 0.0025) are better choices. For 77 GHz radar, PTFE or LCP substrates are standard.

Can I-Tera MT40 be processed on standard FR-4 equipment?

Yes. It uses thermoset resin with E-glass reinforcement, so standard lamination presses, carbide drills, permanganate desmear, and electroless copper plating lines all apply without modification. This is its primary cost advantage over PTFE-based laminates.

What copper foil types pair best with I-Tera MT40?

For 56G PAM-4 channels, VLP or HVLP foil (Rz ≤ 2 µm) is strongly recommended. For sub-10 GHz RF or 25G NRZ digital, standard RTF (reverse-treated foil, Rz ≈ 3–5 µm) offers a good balance of adhesion and loss.

How does I-Tera MT40 compare to Megtron 6?

Both target the same loss class (Df ≈ 0.003 at 10 GHz). Megtron 6 has a slightly lower Dk (≈ 3.37 vs 3.45), which can yield marginally wider traces. In practice, the choice often comes down to regional supply-chain availability and fabricator familiarity. Electrically, they are interchangeable for most 56G-class designs.

Is I-Tera MT40 lead-free assembly compatible?

Yes. With a Td of 360 °C and a Tg of 200 °C, it withstands multiple lead-free reflow cycles at peak temperatures of 260 °C without measurable degradation in peel strength or dielectric properties.

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