RT Duroid 6002 PCB: CTE-Matched Design Guide

What Is an RT Duroid 6002 PCB?

An RT Duroid 6002 PCB is a printed circuit board built on Rogers RT/duroid 6002, a PTFE/random-glass-fiber composite laminate engineered for microwave and millimeter-wave circuits that must survive wide temperature swings. Its dielectric constant (Dk) of 2.94 ± 0.04 at 10 GHz and dissipation factor (Df) of 0.0012 make it an ultra-low-loss choice, but the defining feature is its in-plane coefficient of thermal expansion (CTE) of 16 ppm/°C—closely matched to copper’s 17 ppm/°C. That near-perfect CTE match prevents solder-joint fatigue and trace cracking across thermal cycles, which is why the RT Duroid 6002 PCB dominates in satellite transponders, airborne radar, and deep-space electronics where boards may cycle between –55 °C and +125 °C thousands of times.

Key Material Properties of RT Duroid 6002 PCB Substrates

The 0.02 % moisture absorption is among the lowest of any microwave laminate, keeping Dk stable in humid environments and eliminating the need for pre-bake cycles before reflow in most cases. For comparison, standard FR-4 absorbs roughly 0.15–0.25 %, which can shift Dk by several percent at frequencies above a few gigahertz.

CTE Compatibility: Why 16 ppm/°C Changes the RT Duroid 6002 PCB Reliability Picture

In a multilayer microwave assembly, the laminate, copper, solder, and any bonding plies all expand at different rates. If the CTE mismatch between the dielectric and the copper plane exceeds about 5–8 ppm/°C, repeated thermal cycling generates shear stress at the copper-dielectric interface and in plated through-holes. Over hundreds or thousands of cycles, this stress nucleates micro-cracks that raise insertion loss or cause outright opens.

RT/duroid 6002’s in-plane CTE of 16 ppm/°C sits within 1 ppm/°C of copper (17 ppm/°C), making it one of the closest CTE-matched PTFE laminates available. The z-axis CTE of 24 ppm/°C is also moderate for a PTFE-class material, reducing barrel-crack risk in vias compared to woven-PTFE laminates that can exceed 250 ppm/°C above their glass transition temperature.

Use the calculator below to compare the CTE mismatch between RT/duroid 6002 and other materials in your stackup. Enter the CTE values for each layer and the temperature excursion to see the cumulative strain.

For a typical LEO satellite application cycling between –40 °C and +85 °C (ΔT = 125 °C), the in-plane differential strain between RT/duroid 6002 and 1 oz copper is only about 125 × 10⁻⁶ (125 micro-strain)—well within the fatigue endurance limit of electrodeposited copper foil. By contrast, a woven-PTFE laminate with an in-plane CTE of 24 ppm/°C would generate 875 micro-strain under the same cycle, roughly seven times more. That difference directly translates into longer service life and higher reliability at the board level.

If your design demands even tighter CTE control with higher thermal conductivity, the RT/duroid 6035HTC laminate offers a thermal conductivity of 1.44 W/m·K while maintaining a similar Dk range. For applications needing a higher Dk around 10.2, the RT/duroid 6010LM is the companion product in the 6000 series.

Dielectric Performance Across Frequency

RT/duroid 6002’s Dk remains flat from 1 GHz through 40 GHz, with variation typically under ±0.02 across that range. This stability comes from the random-glass-fiber reinforcement, which avoids the anisotropic Dk behavior seen in woven-glass PTFE laminates where the weave pattern creates localized Dk pockets. For antenna arrays and phased-array feed networks operating at Ka-band (26.5–40 GHz) or above, that uniformity translates into tighter beam pointing and lower sidelobe levels.

The Df of 0.0012 at 10 GHz places an RT Duroid 6002 PCB in the ultra-low-loss tier alongside materials like Rogers RO3003. In practical terms, a 50 Ω microstrip on 0.508 mm (20 mil) RT/duroid 6002 at 10 GHz exhibits conductor-plus-dielectric loss of roughly 0.15 dB/cm, of which the dielectric contribution is only about 0.03 dB/cm. At 77 GHz the dielectric loss rises proportionally, but the material remains viable for short feed-line runs in automotive radar front ends, where the Rogers RO3003G2 is another popular alternative.

Stackup Design for RT Duroid 6002 PCB Builds

Most RT Duroid 6002 PCB designs are single- or double-sided microstrip constructions, but multilayer builds are possible using Rogers CuClad 6700 or Rogers 2929 bondply to laminate cores together. The key constraint is that the bonding material must also be low-loss and CTE-compatible; using a high-CTE adhesive defeats the purpose of choosing a CTE-matched core.

Typical Two-Layer Microstrip Stackup

• Layer 1 (Top): 1 oz ED copper, signal traces
• Core: RT/duroid 6002, 0.508 mm (20 mil)
• Layer 2 (Bottom): 1 oz ED copper, ground plane

Four-Layer Stripline Stackup

• Layer 1: Ground plane, 1 oz copper
• Bondply: Rogers 2929, 0.038 mm (1.5 mil)
• Core 1: RT/duroid 6002, 0.254 mm (10 mil)
• Layer 2: Signal (stripline)
• Core 2: RT/duroid 6002, 0.254 mm (10 mil)
• Bondply: Rogers 2929, 0.038 mm (1.5 mil)
• Layer 3: Signal or power
• Core 3: RT/duroid 6002, 0.508 mm (20 mil)
• Layer 4: Ground plane, 1 oz copper

Visualize and adjust your own RT Duroid 6002 PCB stackup with the interactive tool below. Enter the number of layers, core thicknesses, and copper weights to see a cross-section diagram with impedance-critical dimensions called out.

A realistic four-layer stripline stackup using two 10 mil RT/duroid 6002 cores separated by 1.5 mil Rogers 2929 bondply yields a stripline impedance environment where a 50 Ω trace is approximately 0.24 mm (9.5 mil) wide—narrow enough to route between 0.8 mm pitch BGA pads if needed, yet wide enough for standard photolithography. Confirm the exact width with a field solver that accounts for the bondply’s slightly different Dk (approximately 2.94 for Rogers 2929).

Fabrication Considerations

Drilling

PTFE-based laminates like RT/duroid 6002 are softer than FR-4, so standard carbide drill bits work well but must be sharp to avoid smearing the PTFE into the hole wall. Recommended drill parameters: spindle speed 60,000–80,000 RPM, infeed rate 1.5–2.5 m/min for 0.3 mm holes. Stack heights should be limited to two panels to maintain hole quality. Laser drilling (UV or CO₂) is feasible for microvias down to 75 µm (3 mil) diameter.

Plating and Hole Preparation

PTFE is chemically inert, which means electroless copper will not nucleate on a bare PTFE hole wall without surface activation. Sodium-naphthalene etch or plasma desmear (CF₄/O₂ gas mix) is required to create a micro-rough, wettable surface before electroless copper deposition. Skipping or under-processing this step is the most common root cause of via reliability failures in PTFE boards. IPC-6018 qualification standard for high-frequency laminates covers acceptance criteria for plated through-holes in PTFE substrates.

Etching

Standard alkaline or cupric-chloride etch chemistries work without issue. Because RT/duroid 6002 uses random (non-woven) glass reinforcement, the laminate surface is smoother than woven-glass alternatives, which improves fine-line resolution. Feature widths down to 75 µm (3 mil) are achievable with standard photo-imaging processes.

Soldering

The low moisture absorption (0.02 %) means RT Duroid 6002 PCB assemblies rarely blister during lead-free reflow at 260 °C peak. No special bake-out is required for boards stored in standard dry-pack conditions. The CTE match to copper also reduces the risk of pad lifting during thermal shock.

Comparing RT Duroid 6002 PCB to Other Low-Loss Laminates

Choose an RT Duroid 6002 PCB when your primary concern is long-term CTE-matched reliability under extreme thermal cycling—satellite payloads, military radar, and deep-space probes. Choose RO3003 when you need slightly higher Dk for narrower traces and are operating at automotive-radar frequencies. Choose CLTE-MW when you need the lowest possible Dk (2.12) and isotropic CTE in all three axes for large phased-array panels. Choose Taconic TLX-8 when budget is a factor and the thermal environment is benign enough that the higher z-axis CTE is acceptable.

Application Spotlight

Space and Satellite Systems

RT/duroid 6002 has extensive flight heritage on geostationary and LEO satellite platforms. Its low outgassing (meets NASA ASTM E595 outgassing criteria: TML < 1.0 %, CVCM < 0.10 %) qualifies it for use inside sealed spacecraft enclosures where volatile condensation on optics or sensors is unacceptable. Feed networks for C-band and Ku-band transponders are a classic application.

Military and Airborne Radar

Phased-array radar T/R module substrates and beam-forming networks use RT/duroid 6002 for its dimensional stability over the –55 °C to +125 °C military temperature range. The random-glass reinforcement provides isotropic in-plane properties, eliminating the Dk variation with trace orientation that can shift beam squint in large arrays.

Test and Measurement Fixtures

Calibration substrates and probe-station test boards benefit from the tight Dk tolerance (±0.04) and low Df, ensuring repeatable measurements up to 40 GHz and beyond. The material’s dimensional stability means a fixture fabricated today will measure the same as one fabricated a year from now.

Design Tips and Common Pitfalls

• Do not assume FR-4 prepreg is acceptable as a bondply. The CTE mismatch and higher Df of FR-4 prepreg will negate the benefits of the RT/duroid 6002 core. Use Rogers 2929 or CuClad 6700 bonding film.
• Specify rolled-annealed (RA) copper for flex-prone areas. RA copper has better fatigue ductility than electrodeposited (ED) copper, which matters in applications with vibration or repeated thermal cycling.
• Account for the soft substrate during assembly. RT/duroid 6002 is more flexible than ceramic-filled laminates. Support the board during pick-and-place to avoid deflection that can cause tombstoning of small passives.
• Use back-drilling or controlled-depth drilling for stubs. At frequencies above 20 GHz, via stubs in multilayer builds can create resonant nulls in the passband. RT/duroid 6002 drills cleanly, making back-drilling straightforward.
• Keep panel utilization in mind. Standard panel sizes are 12 × 18 in (305 × 457 mm) and 18 × 24 in (457 × 610 mm). Larger custom panels may have extended lead times.

Relevant Standards

RT Duroid 6002 PCB assemblies intended for high-reliability applications should be fabricated and inspected per IPC-6012 Class 3 or Class 3/A for rigid printed boards, with additional qualification per IPC-6018 for high-frequency laminates. Outgassing testing per ASTM E595 is mandatory for space-flight hardware. Moisture sensitivity level (MSL) classification per J-STD-020 is typically MSL 1 for RT/duroid 6002 due to its negligible moisture uptake.

Frequently Asked Questions

Can an RT Duroid 6002 PCB be used above 40 GHz?

Yes. The material’s Dk remains stable and Df stays below 0.002 through W-band (75–110 GHz). Loss becomes conductor-dominated at these frequencies, so surface roughness of the copper cladding matters more than the dielectric. Specify low-profile ED copper or RA copper to minimize conductor loss at millimeter-wave frequencies.

Is RT/duroid 6002 compatible with lead-free soldering?

RT/duroid 6002 withstands 260 °C peak reflow temperatures required by SAC305 lead-free solder profiles. Its low moisture absorption virtually eliminates delamination risk during reflow. No pre-bake is typically needed if the material has been stored in factory-sealed dry-pack.

How does RT/duroid 6002 compare to RT/duroid 5880?

RT/duroid 5880 uses woven glass/PTFE and has a lower Dk of 2.20, but its in-plane CTE is about 31 ppm/°C in the x-direction and 48 ppm/°C in the y-direction—far from copper’s 17 ppm/°C. RT/duroid 6002’s random-glass reinforcement gives it a nearly isotropic and copper-matched CTE, making it the better choice for thermally demanding environments. Choose 5880 when you need the lowest possible Dk and the thermal environment is mild.

What bonding films work with RT/duroid 6002 for multilayer builds?

Rogers 2929 bondply (Dk 2.94, Df 0.003) and CuClad 6700 bonding film are the recommended options. Both are PTFE-based and maintain low loss and CTE compatibility. Avoid epoxy or acrylic adhesives, which introduce CTE mismatch and higher dielectric loss.

What is the typical lead time for RT/duroid 6002 laminates?

Standard thicknesses (0.508 mm and 0.787 mm with 1 oz ED copper) are usually stocked by Rogers-authorized distributors with lead times of 2–4 weeks. Non-standard thicknesses, RA copper cladding, or large custom panels may require 6–10 weeks. Confirm availability early in the design cycle, especially for space-qualified lots that require full traceability.